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PIC18F6410E/PTSQTP Datasheet(PDF) 162 Page - Microchip Technology |
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PIC18F6410E/PTSQTP Datasheet(HTML) 162 Page - Microchip Technology |
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162 / 404 page ![]() PIC18F6310/6410/8310/8410 DS39635A-page 160 Preliminary 2004 Microchip Technology Inc. 15.1 CCP Module Configuration Each Capture/Compare/PWM module is associated with a control register (generically, CCPxCON) and a data register (CCPRx). The data register, in turn, is comprised of two 8-bit registers: CCPRxL (low byte) and CCPRxH (high byte). All registers are both readable and writable. 15.1.1 CCP MODULES AND TIMER RESOURCES The CCP modules utilize Timers 1, 2 or 3, depending on the mode selected. Timer1 and Timer3 are available to modules in Capture or Compare modes, while Timer2 is available for modules in PWM mode. TABLE 15-1: CCP MODE – TIMER RESOURCE The assignment of a particular timer to a module is determined by the Timer-to-CCP enable bits in the T3CON register (Register 14-1). All three modules may be active at any given time and may share the same timer resource if they are configured to operate in the same mode (Capture/Compare or PWM) at the same time. Depending on the configuration selected, up to three timers may be active at once, with modules in the same configuration (Capture/Compare or PWM) sharing timer resources. The possible configurations are shown in Figure 15-1. 15.1.2 CCP2 PIN ASSIGNMENT The CCP2MX configuration bit determines if CCP2 is multiplexed to its default or alternate assignment. By default, CCP2 is assigned to RC1 (CCP2MX = 1). If CCP2MX is cleared, CCP2 is multiplexed with either RE7 or RB3 (RE7 is the only alternative assignment for 64-pin devices). For any device in Microcontroller mode, the alternate CCP2 assignment is RE7. For 80-pin devices in Microcprocessor, Extended Microcontroller or Microcon- troller with Boot Block mode, the alternate assignment is RB3. Note that RE7 is the only alternative assignment for 64-pin devices. Changing the pin assignment of CCP2 does not auto- matically change any requirements for configuring the port pin. Users must always verify that the appropriate TRIS register is configured correctly for CCP2 operation, regardless of where it is located. FIGURE 15-1: CCP AND TIMER INTERCONNECT CONFIGURATIONS CCP Mode Timer Resource Capture Compare PWM Timer1 or Timer3 Timer1 or Timer3 Timer2 Timer1 is used for all Capture and Compare operations for all three CCP modules. Timer2 is used for PWM oper- ations for all three CCP modules. Timer3 is not used. All modules may share Timer1 and Timer2 resources as common time bases. Timer1 is used for Capture and Compare operations for CCP1 and Timer 3 is used for CCP2 and CCP3. All three modules share Timer2 as a common time base for PWM operation. Timer3 is used for all Capture and Compare operations for all three CCP modules. Timer2 is used for PWM oper- ations for all three CCP modules. Timer1 is not used. All modules may share Timer2 and Timer3 resources as common time bases. TMR1 TMR2 TMR3 CCP3 CCP2 CCP1 TMR1 TMR2 TMR3 CCP3 CCP2 CCP1 TMR1 TMR2 TMR3 CCP3 CCP2 CCP1 TMR1 TMR3 TMR2 CCP3 CCP2 CCP1 T3CCP2:TCCP1 = 00 T3CCP2:TCCP1 = 01 T3CCP2:TCCP1 = 10 T3CCP2:TCCP1 = 11 Timer1 is used for Capture and Compare operations for CCP1 and CCP2. Timer 3 is used for CCP3. All three modules share Timer2 as a common time base for PWM operation. |
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