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STE10A Datasheet(PDF) 77 Page - STMicroelectronics

Part # STE10A
Description  PCI 10/100 Ethernet controller with integrated PHY (3.3V)
PDF  82 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STE10A Datasheet(HTML) 77 Page - STMicroelectronics

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STE10/100A
Electrical specifications and timings
77/82
Figure 20.
Serial EEPROM timings
Figure 21.
Normal link pulse timings
Table 25.
10BASE-T normal link pulse (NLP) timings specifications
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Units
Tnpw
NLP width
10Mbps
100
ns
Tnpc
NLP period
10Mbps
8
24
ms
Table 26.
Auto-negotiation fast link pulse (FLP) timings specifications
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Units
Tflpw
FLP Width
100
ns
Tflcpp
Clock pulse to clock pulse
period
111
125
139
µs
Tflcpd
Clock pulse to data pulse
period
55.5
62.5
69.5
µs
-
Number of pulses in one
burst
17
33
#
Tflbw
Burst width
2
ms
Tflbp
FLP burst period
8
16
24
ms
Tedth
CS
CLK
DI
Tecsh
Tecsl
Tedts
Tecss
Tnpw
Tnpc



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