ADFS7124-4BBCPZ datasheet(45/93 Pages) AD

45 / 93 page

Data Sheet

ADFS7124-4

GETTING STARTED

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Rev. 0 | 45 of 93

Figure 72 shows an example of how the channel registers span

between the analog input pins and the setup configurations down-

stream. In this random example, two differential inputs and two

single-ended inputs are required. The single-ended inputs are the

AIN0/AIN7 and AIN6/AIN7 combinations. The first differential input

pair (AIN0/AIN1) uses Setup 0. The two single-ended input pairs

(AIN0/AIN7 and AIN6/AIN7) are set up as diagnostics; therefore,

they use a separate setup (Setup 1). The final differential input

(AIN2/AIN3) also uses a separate setup: Setup 2.

Given that three setups are selected for use, the CONFIG_0,

CONFIG_1, and CONFIG_2 registers are programmed as required,

and the FILTER_0, FILTER_1, and FILTER_2 registers are also

programmed as required. Optional gain and offset correction can

be employed on a per setup basis by programming the GAIN_0,

GAIN_1, and GAIN_2 registers, and the OFFSET_0, OFFSET_1,

and OFFSET_2 registers.

In the example shown in Figure 72, the CHANNEL_0 to CHAN-

NEL_3 registers are used. Setting the MSB (the enable bit) in each

of these registers enables the four combinations through the cross-

point multiplexer. When the ADFS7124-4 converts, the sequencer

transitions in ascending sequential order from CHANNEL_0 to

CHANNEL_1 to CHANNEL_2, and then on to CHANNEL_3 before

looping back to CHANNEL_0 to repeat the sequence.

Figure 72. Mixed Differential and Single-Ended Configuration Using Multiple Shared Setups

ADFS7124-4BBCPZ Datasheet(PDF) 45 Page - Analog Devices