ADFS7124-4BBCPZ datasheet(86/93 Pages) AD

86 / 93 page

Data Sheet

ADFS7124-4

ON-CHIP REGISTERS

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Rev. 0 | 86 of 93

Table 70. Error Register Bit Descriptions

Bits

Bit Name

Description

23:20

These bits must be programmed with a Logic 0 for correct operation.

LDO_CAP_ERR

Analog/digital LDO decoupling capacitor check. This flag is set if the decoupling capacitors required for the analog and digital LDOs

are not connected to the ADFS7124-4. Note that a missing decoupling capacitor can cause the ADC to reset. However, this is easily

detectable at the system level.

ADC_CAL_ERR

Calibration check. If a calibration is initiated but not completed, this flag is set to indicate that an error occurred during the calibration.

The associated calibration register is not updated.

ADC_CONV_ERR

This bit indicates whether a conversion is valid. This flag is set if an error occurs during a conversion.

ADC_SAT_ERR

ADC saturation flag. This flag is set if the modulator is saturated during a conversion.

AINP_OV_ERR

Overvoltage detection on AINP.

AINP_UV_ERR

Undervoltage detection on AINP.

AINM_OV_ERR

Overvoltage detection on AINM.

AINM_UV_ERR

Undervoltage detection on AINM.

REF_DET_ERR

Reference detection. This flag indicates when the external reference being used by the ADC is open circuit or less than 0.7 V.

This bit must be programmed with a Logic 0 for correct operation.

DLDO_PSM_ERR

Digital LDO error. This flag is set if an error is detected with the digital LDO.

This bit must be programmed with a Logic 0 for correct operation.

ALDO_PSM_ERR

Analog LDO error. This flag is set if an error is detected with the analog LDO voltage.

SPI_IGNORE_ERR

During power-on reset and calibrations, the on-chip registers cannot be written to. User write instructions are ignored by the ADC. This

bit is set, indicating that the ADC is busy and the write instruction has been ignored. The SPI_IGNORE_ERR bit is cleared when read.

SPI_SCLK_CNT_ERR

All serial communications are some multiple of eight bits. This bit is set when the number of SCLK cycles is not a multiple of eight.

SPI_READ_ERR

This bit is set when an error occurs during an SPI read operation.

SPI_WRITE_ERR

This bit is set when an error occurs during an SPI write operation.

SPI_CRC_ERR

This bit is set if an error occurs in the CRC check of the serial communications.

MM_CRC_ERR

Memory map error. A CRC calculation is performed on the memory map each time that the registers are written to. Following this,

periodic CRC checks are performed on the on-chip registers. If the register contents have changed, the MM_CRC_ERR bit is set.

ROM_CRC_ERR

ROM error. A CRC calculation is performed on the ROM contents (contains the default register values) on power-up. If the contents

have changed, the ROM_CRC_ERR bit is set.

ERROR_EN REGISTER

RS[5:0] = 0, 0, 0, 1, 1, 1 Power-On/Reset = 0x000040

All the diagnostic functions can be enabled or disabled by setting the appropriate bits in this register.

Table 71 outlines the bit designations for the register. Bit 23 is the first bit of the data stream. The number in parentheses indicates the

power-on/reset default status of that bit.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0 (0)

MCLK_ CNT_

EN (0)

LDO_CAP_CHK_

TEST_EN (0)

LDO_CAP_CHK (0)

ADC_CAL_ERR_

EN (0)

ADC_CONV_ ERR_

EN (0)

ADC_SAT_ ERR_EN (0)

AINP_OV_

ERR_EN (0)

AINP_UV_

ERR_EN (0)

AINM_OV_ERR_ EN (0) AINM_UV_

ERR_EN (0)

REF_DET_ERR

_EN (0)

DLDO_PSM_

TRIP_TEST_EN (0)

DLDO_PSM_

ERR_EN (0)

ALDO_PSM_

TRIP_TEST_EN (0)

ALDO_ PSM_

ERR_EN (0)

SPI_

IGNORE_

ERR_EN (1)

SPI_SCLK_CNT_

ERR_EN (0)

SPI_READ_

ERR_EN (0)

SPI_WRITE_

ERR_EN (0)

SPI_CRC_ERR_

EN (0)

MM_CRC_ERR_ EN ROM_CRC_ERR_EN

Table 71. ERROR_EN Register Bit Descriptions

Bits

Bit Name

Description

This bit must be programmed with a Logic 0 for correct operation.

MCLK_CNT_EN

Controller clock counter. When this bit is set, the controller clock counter is enabled and the result is reported through the

MCLK_COUNT register. The counter monitors the controller clock being used by the ADC. If an external clock is the clock

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