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WM9714LGEFL/V Datasheet(PDF) 47 Page - Wolfson Microelectronics plc |
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WM9714LGEFL/V Datasheet(HTML) 47 Page - Wolfson Microelectronics plc |
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47 / 94 page ![]() Pre-Production WM9714L w PP Rev 3.0 June 2006 47 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7 MU 1 (Mute) Mute MONO 1: Mute (OFF) 0: No Mute (ON) 6 ZC 0 Right zero cross enable 0: Change gain immediately 1: Change gain only on zero crossings, or after time-out 08h MONO Vol 5:0 MONOVOL 000000 (0dB) MONO Volume 000000: 0dB (maximum) 000001: -1.5dB … (1.5dB steps) 011111: -46.5dB 1xxxxx: -46.5dB Table 35 Mono PGA Control SPEAKER OUTPUTS – SPKL AND SPKR The SPKL and SPKR (pins 35 and 36) are designed to drive a loudspeaker load down to 8 Ω and can also be used as line outputs and headphone outputs. They are designed to drive an 8 Ω load AC coupled or in a BTL (capless) configuration. The available input sources are HPMIXL/R, SPKMIXL/R, INV1/2 and Vmid (see Table 36). REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 13:11 SPKL 000 (Vmid) SPKL input source select 000: Vmid 001: no input (tri-stated if SPKL=1 in register 3Eh) 010: HPMIXL 011: SPKMIX 100: INV1 101-111: unused 1Ch Output PGA Mux Select 10:8 SPKR 000 (Vmid) SPKR input source select 000: Vmid 001: no input (tri-stated if SPKR=1 in register 3Eh) 010: HPMIXR 011: SPKMIX 100: INV2 101-111: unused Table 36 SPKL / SPKR PGA Input Source The signal volume on SPKL and SPKR can be independently adjusted under software control by writing to register 02h. When not in use SPKL and SPKR can be powered down using the Powerdown register bits SPKL and SPKR (register 3Eh, bits [8:7]). To minimise pops and clicks when the PGA is powered down / up it is recommended that the Vmid input is selected during the power down / up cycle. This ensures the same DC level is maintained on the output pin throughout. |
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