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SL3S1005FUD2/HAP Datasheet(PDF) 8 Page - NXP Semiconductors |
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SL3S1005FUD2/HAP Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 33 page ![]() NXP Semiconductors SL3S1005 UCODE 9xm 8 Mechanical specification UCODE 9xm wafers are available in 120 µm thickness. The 120 µm thick wafer includes a 10 µm Polyimide spacer resulting in less coupling between the antenna and the active circuit, leaving more room for process control (for example, pressure). 8.1 Wafer specification 8.1.1 12-inch wafer See [3]. Wafer Designation each wafer is scribed with batch number and wafer number Diameter 300 mm (12") unsawn Thickness 120 µm ± 15 µm Number of pads 4 Pad location nondiagonal / placed in chip corners Process CMOS 0.14 µm Batch size 25 wafers Net printed dies per wafer 242104 Wafer backside Material Si Treatment ground and stress release Roughness Ra max. 0.5 µm, Rt max. 5 µm Chip dimensions Die size excluding scribe 0.525 mm × 0.51 mm = 0.268 mm2 X-dimension = 8.6 µm Scribe line width: Y-dimension = 8.6 µm Passivation on front Type Sandwich structure Material PE-Oxide (on top) Thickness 2.25 µm total thickness of passivation Polyimide spacer 10 µm ± 2 µm Au pads Pad material > 99.9 % pure Au Pad hardness 35 – 80 HV 0.005 Pad shear strength > 70 MPa Pad height 3 µm Table 3. 12-inch specification, plasma diced SL3S1005 All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product data sheet Rev. 3.1 — 12 February 2025 Document feedback 8 / 33 |
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