| Electronic Components Datasheet Search |
|
AX88196BLF Datasheet(PDF) 56 Page - ASIX Electronics Corporation |
|
|
|||||||||||||||||||||||||||||
AX88196BLF Datasheet(HTML) 56 Page - ASIX Electronics Corporation |
|
56 / 86 page ![]() ASIX ELECTRONICS CORPORATION 56 AX88196BLF 5.2.1 MR0 -- Control Register Bit Descriptions Field Type Description (Default = 3100h) 0.15 (SW_RESET) 0, RW / SC 1 = Software reset 0 = Normal operation 0.14 (LOOPBACK) 0, RW 1 = Loop-back enabled 0 = Normal operation 0.13(SPEED100) 1, RW 1 = 100Mbits/s 0 = 10Mbits/s 0.12 (NWAY_ENA) 1, RW 1 = Auto negotiation enabled. Bits 8 and 13 of this register are ignored when this bit is set. 0 = Auto negotiation disabled. Bits 8 and 13 of this register determine the link speed and mode. 0.11 (POWER DOWN) 0, RW 1 = Power down 0 = Normal operation 0.10 (ISOLATE) 0, R/W 1 = Isolate 0 = Normal operation 0.9 (REDONWAY) 0, RW / SC Restart Autonegotiation. 1 = Restart auto negotiation 0 = Normal operation 0.8 (FULL_DUP) 1, RW Duplex Mode. 1 = Full duplex operation 0 = Normal operation 0.7 (COLTST) 0, RW Collision Test. 1 = Collision test enabled 0 = Normal operation 0.6:0 (RESERVED) X, RO Reserved. Write as 0, read as “don’t care” |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |