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PIC16F18346-I/SS Datasheet(PDF) 39 Page - Microchip Technology |
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PIC16F18346-I/SS Datasheet(HTML) 39 Page - Microchip Technology |
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39 / 471 page  Bank 7 CPU CORE REGISTERS; see Table 4-2 for specifics 38Ch INLVLA ― ― INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 --11 1111 --11 1111 38Dh INLVLB X ― Unimplemented ― ― ― X INLVLB7 INLVLB6 INLVLB5 INLVLB4 ― ― ― ― 1111 ---- 1111 ---- 38Eh INLVLC X ― ― ― INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 --11 1111 --11 1111 ― X INLVLC7 INLVLC6 INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 1111 1111 1111 1111 38Fh ― ― Unimplemented ― ― 390h ― ― Unimplemented ― ― 391h IOCAP ― ― IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0 --00 0000 --00 0000 392h IOCAN ― ― IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0 --00 0000 --00 0000 393h IOCAF ― ― IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0 --00 0000 --00 0000 394h IOCBP X ― Unimplemented ― ― ― X IOCBP7 IOCBP6 IOCBP5 IOCBP4 ― ― ― ― 0000 ---- 0000 ---- 395h IOCBN X ― Unimplemented ― ― ― X IOCBN7 IOCBN6 IOCBN5 IOCBN4 ― ― ― ― 0000 ---- 0000 ---- 396h IOCBF X ― Unimplemented ― ― ― X IOCBF7 IOCBF6 IOCBF5 IOCBF4 ― ― ― ― 0000 ---- 0000 ---- 397h IOCCP X ― ― ― IOCCP5 IOCCP4 IOCCP3 IOCCP2 IOCCP1 IOCCP0 --00 0000 --00 0000 ― X IOCCP7 IOCCP6 IOCCP5 IOCCP4 IOCCP3 IOCCP2 IOCCP1 IOCCP0 0000 0000 0000 0000 398h IOCCN X ― ― ― IOCCN5 IOCCN4 IOCCN3 IOCCN2 IOCCN1 IOCCN0 --00 0000 --00 0000 ― X IOCCN7 IOCCN6 IOCCN5 IOCCN4 IOCCN3 IOCCN2 IOCCN1 IOCCN0 0000 0000 0000 0000 399h IOCCF X ― ― ― IOCCF5 IOCCF4 IOCCF3 IOCCF2 IOCCF1 IOCCF0 --00 0000 --00 0000 ― X IOCCF7 IOCCF6 IOCCF5 IOCCF4 IOCCF3 IOCCF2 IOCCF1 IOCCF0 0000 0000 0000 0000 TABLE 4-4: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q = depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’. Note 1: Only on PIC16F18326/18346. 2: Register accessible from both User and ICD Debugger. |
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