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PIC16F18346-I/SS Datasheet(PDF) 7 Page - Microchip Technology |
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PIC16F18346-I/SS Datasheet(HTML) 7 Page - Microchip Technology |
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7 / 471 page ![]() VSS 14 13 — — — — — — — — — — — — — — — — VSS OUT(2) — — — — C1OUT NCO1 — DSM TMR0 CCP1 PWM5 CWG1A CWG2A SDA1(3) SDA2(3) CK CLC1OUT CLKR — — — — — — — C2OUT — — — — CCP2 PWM6 CWG1B CWG2B SCL1(3) SCL2(3) DT CLC2OUT — — — — — — — — — — — — — CCP3 — CWG1C CWG2C SDO1 SDO2 TX CLC3OUT — — — — — — — — — — — — — CCP4 — CWG1D CWG2D SCK1 SCK2 — CLC4OUT — — — — TABLE 2: 14/16-PIN ALLOCATION TABLE (PIC16(L)F18326) (CONTINUED) Note 1: Default peripheral input. Input can be moved to any other pin with the PPS input selection registers. 2: All pin outputs default to PORT latch data. Any pin can be selected as a digital peripheral output with the PPS output selection registers. 3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections. 4: These pins are configured for I2C logic levels; clock and data signals may be assigned to any of these pins. Assignments to the other pins (e.g., RA5) will operate, but logic levels will be standard TTL/ ST as selected by the INLVL register. |
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