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PIC16F18346-I/SS Datasheet(PDF) 49 Page - Microchip Technology |
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PIC16F18346-I/SS Datasheet(HTML) 49 Page - Microchip Technology |
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49 / 471 page  Bank 28 CPU CORE REGISTERS; see Table 4-2 for specifics E0Ch ― ― Unimplemented ― ― E0Dh ― ― Unimplemented ― ― E0Eh ― ― Unimplemented ― ― E0Fh PPSLOCK ― ― ― ― ― ― ― PPSLOCKED ---- ---0 ---- ---0 E10h INTPPS ― ― ― INTPPS<4:0> ---0 0010 ---u uuuu E11h T0CKIPPS ― ― ― T0CKIPPS<4:0> ---0 0010 ---u uuuu E12h T1CKIPPS ― ― ― T1CKIPPS<4:0> ---0 0101 ---u uuuu E13h T1GPPS ― ― ― T1GPPS<4:0> ---0 0100 ---u uuuu E14h CCP1PPS ― ― ― CCP1PPS<4:0> ---1 0011 ---u uuuu E15h CCP2PPS ― ― ― CCP2PPS<4:0> ---1 0101 ---u uuuu E16h CCP3PPS ― ― ― CCP3PPS<4:0> ---0 0010 ---u uuuu E17h CCP4PPS X ― ― ― ― CCP4PPS<4:0> ---1 0001 ---u uuuu ― X ― ― ― CCP4PPS<4:0> ---0 0100 ---u uuuu E18h CWG1PPS ― ― ― CWG1PPS<4:0> ---0 0010 ---u uuuu E19h CWG2PPS ― ― ― CWG2PPS<4:0> ---0 0010 ---u uuuu E1Ah MDCIN1PPS ― ― ― MDCIN1PPS<4:0> ---1 0010 ---u uuuu E1Bh MDCIN2PPS ― ― ― MDCIN2PPS<4:0> ---1 0101 ---u uuuu E1Ch MDMINPPS ― ― ― MDMINPPS<4:0> ---1 0011 ---u uuuu E1Dh SSP2CLKPPS X ― ― ― ― SSP2CLKPPS<4:0> ---1 0100 ---u uuuu ― X ― ― ― SSP2CLKPPS<4:0> ---0 1111 ---u uuuu E1Eh SSP2DATPPS X ― ― ― ― SSP2DATPPS<4:0> ---1 0101 ---u uuuu ― X ― ― ― SSP2DATPPS<4:0> ---0 1101 ---u uuuu E1Fh SSP2SSPPS X ― ― ― ― SSP2SSPPS<4:0> ---0 0000 ---u uuuu ― X ― ― ― SSP2SSPPS<4:0> ---0 0001 ---u uuuu E20h SSP1CLKPPS X ― ― ― ― SSP1CLKPPS<4:0> ---1 0000 ---u uuuu ― X ― ― ― SSP1CLKPPS<4:0> ---0 1110 ---u uuuu TABLE 4-4: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q = depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’. Note 1: Only on PIC16F18326/18346. 2: Register accessible from both User and ICD Debugger. |
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