LMZ22010

SNVS687H – MARCH 2011 – REVISED AUGUST 2015

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Typical Application (continued)

For VOUT = 0.8 V the FB pin can be connected to the output directly and RFBB can be set to 8.06 kΩ to provide

minimum output load.

Table 1 list the values for RFBT , and RFBB.

Table 1. Typical Application Bill of Materials

REF DES

DESCRIPTION

CASE SIZE

MANUFACTURER

MANUFACTURER P/N

U1

SIMPLE SWITCHER

PFM-11

Texas Instruments

LMZ22010TZ

CIN1,6 (OPT)

0.047 µF, 50 V, X7R

1206

Yageo America

CC1206KRX7R9BB473

CIN2,3,4

10 µF, 50 V, X7R

1210

Taiyo Yuden

UMK325BJ106MM-T

CIN5 (OPT)

CAP, AL, 150 µF, 50 V

Radial G

Panasonic

EEE-FK1H151P

CO1,5 (OPT)

0.047 µF, 50 V, X7R

1206

Yageo America

CC1206KRX7R9BB473

CO2 (OPT)

47 µF, 10 V, X7R

1210

Murata

GRM32ER61A476KE20L

CO3,4

330

μF, 6.3 V, 0.015 Ω

CAPSMT_6_UE

Kemet

T520D337M006ATE015

RFBT

3.32 k

Ω

0805

Panasonic

ERJ-6ENF3321V

RFBB

1.07 k

Ω

0805

Panasonic

ERJ-6ENF1071V

RSYNC

1.50 k

Ω

0805

Vishay Dale

CRCW08051K50FKEA

RENT

42.2 k

Ω

0805

Panasonic

ERJ-6ENF4222V

RENB

12.7 k

Ω

0805

Panasonic

ERJ-6ENF1272V

CSS

0.47

μF, ±10%, X7R, 16 V

0805

AVX

0805YC474KAT2A

D1 (OPT)

5.1 V, 0.5 W

SOD-123

Diodes Inc.

MMSZ5231BS-7-F

8.2.2.4 Soft-Start Capacitor Selection

Programmable soft-start permits the regulator to slowly ramp to its steady-state operating point after being

enabled, thereby reducing current inrush from the input supply and slowing the output voltage rise-time.

Upon turnon, after all UVLO conditions have been passed, an internal 1.6-ms circuit slowly ramps the SS input to

implement internal soft start. If 1.6 ms is an adequate turnon time then the Css capacitor can be left unpopulated.

Longer soft-start periods are achieved by adding an external capacitor to this input.

Soft-start duration is given by the formula:

tSS = VREF × CSS / Iss = 0.795 V × CSS / 50 µA

(6)

This equation can be rearranged as follows:

CSS = tSS × 50 μA / 0.795 V

(7)

Using a 0.22-

μF capacitor results in 3.5-ms typical soft-start duration; and 0.47 μF results in 7.5 ms typical. 0.47

μF is a recommended initial value.

As the soft-start input exceeds 0.795 V the output of the power stage will be in regulation and the 50-

μA current

is deactivated. The following conditions will reset the soft-start capacitor by discharging the SS input to ground

with an internal current sink.

•

The Enable input being pulled low

•

A thermal shutdown condition

•

VIN falling below 4.3 V (typical) and triggering the VCC UVLO

8.2.2.5 Tracking Supply Divider Option

The tracking function allows the module to be connected as a slave supply to a primary voltage rail (often the

3.3-V system rail) where the slave module output voltage is lower than that of the master. Proper configuration

allows the slave rail to power up coincident with the master rail such that the voltage difference between the rails

during ramp-up is small (that is, < 0.15 V typical). The values for the tracking resistive divider must be selected

such that the effect of the internal 50-µA current source is minimized. In most cases the ratio of the tracking

20

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