ADC32RF44IRMPR datasheet(115/135 Pages) TI2

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ADC32RF44

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SBAS809A – FEBRUARY 2017 – REVISED MARCH 2017

Product Folder Links: ADC32RF44

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10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

10.1 Application Information

10.1.1 Start-Up Sequence

The steps in Table 118 are recommended as the power-up sequence when the ADC32RF44 is in bypass mode

with a 12-bit output (LMFS = 82820).

Table 118. Initialization Sequence

STEP

DESCRIPTION

PAGE, REGISTER

ADDRESS AND DATA

COMMENT

Supply all supply voltages. There is no required

power-supply sequence for the 1.15 V, 1.2 V,

and 1.9 V supplies, and can be supplied in any

order.

—

Provide the SYSREF signal.

—

Pulse a hardware reset (low-to-high-to-low) on

pins 33 and 34.

—

Write the register addresses described in the

PowerUpConfig file.

See the files located in

SBAA226

The Power-up config file contains analog

trim registers that are required for best

performance of the ADC. Write these

registers every time after power up.

Write the register addresses mentioned in the

ILConfigNyqX_ChA file, where X is the Nyquist

zone.

See the files located in

SBAA226

Based on the signal band of interest, provide

the Nyquist zone information to the device.

Write the register addresses mentioned in the

ILConfigNyqX_ChB file, where X is the Nyquist

zone.

See the files located in

SBAA226

This step optimizes device’ performance by

reducing interleaving mismatch errors.

6.1

Wait for 50 ms for the device to estimate the

interleaving errors.

—

Depending upon the Nyquist band of operation,

choose and write the registers from the

appropriate file, NLConfigNyqX_ChA, where X

is the Nyquist zone.

See the files located in

SBAA226

Third-order nonlinearity of the device is

optimized by this step for channel A.

7.1

Depending upon the Nyquist band of operation,

choose and write the registers from the

appropriate file, NLConfigNyqX_ChB, where X

is the Nyquist zone.

See the files located in

SBAA226

Third-order nonlinearity of the device is

optimized by this step for channel B.

Configure the JESD interface and DDC block

by writing the registers mentioned in the DDC

Config file.

See the files located in

SBAA226

Determine the DDC and JESD interface

LMFS options. Program these options in this

step.

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