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UCC28056CDBVT Datasheet(PDF) 23 Page - Texas Instruments |
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UCC28056CDBVT Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 55 page ![]() DRV Ovp2Fltb Zcdb TOvp2Blk TOvp2En IL(t) VZC(t) ± Cold NTC VZC(t) ± Hot NTC VOvp2Th 23 UCC28056 www.ti.com SLUSD37E – OCTOBER 2017 – REVISED NOVEMBER 2019 Product Folder Links: UCC28056 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Feature Description (continued) The UCC28056 triggers an Ovp2 fault if the time between the falling edge of the Ovp2 comparator output and the Zcdb signal is less than TOvp2En for three consecutive switching cycles. The series impedance required to trigger a false Ovp2 fault is greatly increased because the Ovp2 comparator must be tripped close to the Zcdb point when the current flowing through the NTC resistor is small. An internal discharge resistor (RCODisch) between the COMP and GND pins connected for each switching cycle causes the Ovp2 comparator to trip. This internal resistance discharges the external compensation network reducing power demand and therefore the peak current flowing through the NTC resistor. The internal COMP discharge resistor remains connected for any switching cycle that triggers the Ovp2 comparator. The internal COMP discharge resistor becomes disconnected after the first switching cycle that does not trigger the Ovp2 comparator. By limiting the peak current flowing through the cold NTC resistor, the effect of this circuit is to limit the peak voltage stress applied to the Boost MOSFET during a cold start. Figure 24. Waveforms to Illustrate Ovp2 Operation 8.3.5.4 Thermal Shutdown Protection The controller includes an internal temperature sensor. During the switching period, the controller triggers a Thermal ShutDown (TSD) fault if the internal silicon temperature exceeds TTSDRise for three consecutive switching cycles. The TSD fault halts switching operation and causes the controller to transition to its Stopb state for a period TLongFlt. After this delay the controller continues the normal start-up process. The controller does not exit the Stopb state to begin switching operation while the internal silicon temperature is above TTSDFall. |
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