LAN8818DSLASHKDX datasheet(46/101 Pages) MICROCHIP

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LAN8818D

DS00005832C-page 46

and is either read by software over MDIO or pushed off-chip via the 1588 Serial Timestamp Interface.

PCH/MCH frame signature is read by software via the PTP_TX_MSG_ HEADER2 register. Departure timestamp is read

by software via the PTP_TX_SYNC_SEC_HI/MID/LO and PTP_TX_SYNC_NS_HI/LO registers.

The MCH processing essentially implements a TC between the PHY and the switch, where the switch has subtracted

an arrival value from CF, and the PHY adds the departure timestamp to CF. All other 1588 operations are performed in

the switch.

5.9.4

1588 LOCAL TIME COUNTER

The device contains a single 1588 LTC, shared by the four per-port 1588 Timestamp Engines.

The 1588 LTC is 48 bits of seconds and 30 bits of nanoseconds, plus 32 bits of sub-nanoseconds for precise adjustment.

The 1588 LTC runs from a reference clock, which can be either not frequency-locked to any PHY timing (e.g., 250 MHz

based on an independent reference) or locked to PHY timing but not at a frequency which is a direct multiple (e.g.,

200 MHz based on the same reference clock as PHY timing).

The 1588 LTC is able to be set (initial load) and adjusted using configuration registers, the external 1588_LD_ADJ pin,

and the ePPS. LTC updates from the external 1588_LD_ADJ pin and ePPS are configurable to be either one-shot or

static (repeating).

The following LTC TOD load options are supported:

• Software-based: TOD is loaded from PTP_LTC_SET_x registers when software writes to the PTP_LTC_LOAD

• 1PPS: TOD is loaded from PTP_LTC_SET_x registers when a rising edge is detected on the 1588_LD_ADJ pin.

• 1PPS with TOD: TOD is loaded when a 1PPS rising edge is detected on the 1588_LD_ADJ pin, and the TOD is

also serially encoded on the same pin.

• ePPS: TOD is loaded from PTP_LTC_SET_x registers when a PPS is detected on the 1588_REF_CLK pin.

5.9.5

EXTERNAL 1588 INTERFACE

The device provides the following 1588 I/O pins:

• 1588_REF_CLK: This input pin can provide an independent reference clock to use with the 1588 LTC functions.

Other reference clock options are also supported.

- This pin also supports Embedded 1 Pulse Per Second (ePPS) capability, where the PPS is coded into the

clock signal by moving the falling edge of the clock signal at the appropriate time. ePPS is supported by

Microchip Timing products and the SparX-5 at 25 MHz clock.

• 1588_LD_ADJ: This input pin can be used to synchronize one or more LAN8818D 1588 LTCs with the system

1588 TOD. This pin controls initial setting (load) and incremental update (adjust) of the internal 1588 LTC. It sup-

ports the “1PPS” and “1PPS with TOD” modes described in Section 5.9.4, "1588 Local Time Counter". Note that

while this signal is typically a 1PPS, it can also be a non-repeating signal or a signal which repeats at some rate

other than 1 Hz.

• 1588 Serial Timestamp Interface (1588 STI) (1588_STI_CLK, 1588_STI_CS_N, 1588_STI_DO): When enabled,

the 1588 STI is used to export 1588 timestamp and signature to software during two-step PCH mode operation.

This bus uses Serial Peripheral Interface (SPI) format where the device is the SPI Host.

• 1588_EVENT_B: This output pin provides notification that a configurable 1588 LTC Event has occurred. The noti-

fication is triggered when the internal 1588 LTC has reached the software-configured Event TOD.

- This pin can also be used as a 1588 PPS OUT signal

• 1588 Event LTC Capture pins: Up to eight GPIOs can be designated as PTP GPIO Capture pins. A transition in

the state of any of these input pins causes the 1588 LTC value to be latched in its corresponding set of software-

readable PTP GPIO Capture registers, and optionally generate an interrupt. Refer to Section 5.18, "GPIOs" for

details.

The 1PPS with TOD format is as follows (refer to Section 6.6.12, "1588 1PPS Format and Timing" for additional infor-

mation.):

• 1PPS: Rising edge indicates the 1PPS position, the pulse width is 1 µs.

• Waiting: A gap of 20 µs (logic low) between PPS and TOD

• TOD: 16 TOD octets, each occupies 10 µs consisting of a start bit (logic high), eight TOD bits (lsb-first) and a stop

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