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LAN8818D/KDX Datasheet(PDF) 97 Page - Microchip Technology

Part # LAN8818D/KDX
Description  4-Port Gigabit Ethernet Transceiver with QSGMII
PDF  101 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8818D/KDX Datasheet(HTML) 97 Page - Microchip Technology

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LAN8818D
© 2026 Microchip Technology Inc. and its subsidiaries
DS00005832C-page 97
APPENDIX A: DOCUMENT REVISION HISTORY
TABLE A-1:
REVISION HISTORY
Revision
Section/Figure/Entry
Correction
DS00005832C (01-23-26)
Throughout document.
Part number updated to reflect D0 silicon revision.
Figure 7-1, "100-VQFN
Package (Drawing)",
Figure 7-2, "100-VQFN
Package (Dimensions)",
Figure 7-3, "100-VQFN
Package (Land Pattern)"
Updated Package Drawings
Section 1.1, "General
Terms", Section 5.9.3.1,
"PCH Mode RX", Section
5.9.5, "External 1588 Inter-
face", Figure 6-11
• Added definition for acronym least significant
bit (“lsb” - lowercase).
• Updated reference to “LS bit” to “lsb”.
• Updated relevant “LSB” references to “lsb”.
Section 5.6.3, "Auto-Down-
shift"
Added new Auto-Downshift section.
Section 5.8.1, "Fast Link
Failure"
Added the following note: “EEE cannot be adver-
tised or enabled when FLF is enabled.”
Section 5.9.2.2, "Stand-
alone Mode TX"
Added UDP checksum format information for both
IPv4 and IPv6 specifications.
Section 5.9.3.1, "PCH Mode
RX"
Updated section with information on additional 1588
PCH Header Arrival TimeStamp formats (toward
QSGMII).
Section 6.3, "Power Con-
sumption"
Power consumption values updated for D0 silicon
revision. All previous device mode condition mea-
surement criteria remains the same. Tables for both
“Minimum”
and
“Worst-Case”
measurements
replaced with “Typical” power consumption tables.
Section 7.1, "Top Marking"
Added Top Marking section.
DS00005832B (06-26-25)
Throughout document.
• Changed “Commercial temperature range (0°
to +85°C)” to “Commercial temperature range
(0° to +70°C)”
• Removed information related to “Crystal” refer-
ence clock input
• Removed context related to “VDDAH_x =
3.3V”
Section 3.2, "Pin Descrip-
tions", Table 3-4
Added to clock pin descriptions “125 MHz differen-
tial clock reference is recommended for best
QSGMII performance.”
Section 3.3.1, "Device Mode
Select (MODE_SEL[4:0])"
Removed note “MODE_SEL [4:0] definitions are
preliminary and subject to change.”
Section 5.8, "Synchronous
Ethernet", Figure 5-2
Removed information related to “25 MHz”
Section 5.9, "IEEE 1588
(PTP)"
Updated the note on terminology



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