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LAN8818D/KDX Datasheet(PDF) 58 Page - Microchip Technology

Part # LAN8818D/KDX
Description  4-Port Gigabit Ethernet Transceiver with QSGMII
PDF  101 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8818D/KDX Datasheet(HTML) 58 Page - Microchip Technology

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LAN8818D
DS00005832C-page 58
© 2026 Microchip Technology Inc. and its subsidiaries
The RX QSGMII Extender uses the K28.1 symbol to locate Port 0, then swaps the K28.1 symbol back to the original
K28.5, before sending the four demultiplexed streams to their RX PCS1G blocks.
The following QSGMII preamble formats are supported:
• In PCH/MCH mode, all frames on the PCS1G GMII from the 1588 TSU towards MAC must have exactly 8 bytes of
preamble (including ‘h55, SFD/SMD, and FRAG_COUNT if applicable). The 1588 TSU module will reconstruct the
field to be 8 bytes if it isn’t already, including ensuring an even number of nibbles (integer number of bytes) exists.
• In PCH/MCH mode, all frames on the PCS1G GMII from MAC towards the 1588 TSU must have 8 bytes of pream-
ble (including ‘h55, SFD/SMD, and FRAG_COUNT if applicable). The 1588 TSU is not required to perform any
preamble reconstruction or nibble alignment.
Note, in PCH/MCH mode the first preamble byte will be 10-bit encoded ‘hFB crossing the SerDes.
• In non PCH/MCH mode, frames on the PCS1G GMII from the 1588 TSU towards the MAC do not need to have 8
bytes of preamble. The 1588 TSU module will however ensure an even number of nibbles (integer number of
bytes) exists.
• In non PCH/MCH mode, frames on the PCS1G GMII from MAC towards the 1588 TSU must have an integer num-
ber of preamble bytes, but do not need to have exactly 8 bytes of preamble. The 1588 TSU is not required to per-
form any preamble reconstruction or nibble alignment.
Note, in non PCH/MCH mode the first preamble byte will be 10-bit encoded ‘hFB crossing the SerDes.
QSGMII/Q-USGMII loopbacks are discussed in Section 5.14.4, "QSGMII/Q-USGMII Loopback".
Note:
PHY TX and RX directions are relative to the Ethernet Media Interfaces. QSGMII/Q-USGMII TX and RX
directions are relative to the QSGMII/Q-USGMII SerDes interface. So device frames received from the
Ethernet Media Interfaces are processed in RX GPHY and 1588 blocks, and in TX QSGMII/Q-USGMII
blocks.
Note:
Frame Preemption operates as follows (consistent with the Q-USGMII specification and SparX-5i opera-
tion):
• Frame Preemption over Q-USGMII: With Q-USGMII, the PCH/MCH header replaces the Preamble
bytes including the SMD/SFD and FRAG_COUNT symbols. So the Frame Preemption information is
conveyed as part of the PCH/MCH header.
• Frame Preemption over QSGMII: The SMD/SFD and FRAG_COUNT symbols are passed transpar-
ently through the QSGMII interface as a normal part of the preamble.
In both cases, SPD always appears ahead of each frame across QSGMII or Q-USGMII. Refer to
Section 5.9, "IEEE 1588 (PTP)" for format details.
Note:
If Energy Efficient Ethernet (EEE) is enabled, it is controlled using LPI symbols, which pass transparently
through QSGMII/Q-USGMII.



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