MSC8103SLASHD datasheet(58/104 Pages) FREESCALE

58 / 104 page

MSC8103 Network Digital Signal Processor, Rev. 11

2-18

Freescale Semiconductor

Physical and Electrical Specifications

2.6.5.2 DMA Data Transfers

Table 2-18 describes the DMA signal timing.

The DREQ

signal is synchronized with the falling edge of DLLIN. DONE timing is relative to the rising edge of DLLIN.

To achieve fast response, a synchronized peripheral should assert DREQ according to the timings in Table 2-18.

Figure 2-11 shows synchronous peripheral interaction.

2.6.6

HDI16 Signals

Table 2-18.

DMA Signals

Number

Characteristic

Minimum

Maximum

Units

DREQ set-up time before DLLIN falling edge

—

DREQ hold time after DLLIN falling edge

0.5

—

DONE set-up time before DLLIN rising edge

—

DONE hold time after DLLIN rising edge

0.5

—

DACK/DRACK/DONE delay after DLLIN rising edge

0.5

Figure 2-11.

DMA Signals

Table 2-19.

Host Interface (HDI16) Timing1, 2

Number

Characteristics3

Expression

Value

Unit

44a

Read data strobe minimum assertion width4

HACK read minimum assertion width

(1.5

× TC) + 5.0

Note 11

44b

Read data strobe minimum deassertion width4

HACK read minimum deassertion width

TC + 5.0

Note 11

44c

Read data strobe minimum deassertion width4 after “Last Data Register”

reads5,6, or between two consecutive CVR, ICR, or ISR reads7

HACK minimum deassertion width after “Last Data Register” reads5,6

(2.5

× TC) + 5.0

Note 11

Write data strobe minimum assertion width8

HACK write minimum assertion width

(1.5

× TC) + 5.0

Note 11

Write data strobe minimum deassertion width8

HACK write minimum deassertion width after ICR, CVR and Data Register

writes5

(2.5

× TC) + 5.0

Note 11

Host data input minimum set-up time before write data strobe deassertion8

Host data input minimum set-up time before HACK write deassertion

—

5.0

DLLIN

DREQ

DONE Input

DACK/DONE/DRACK Outputs

MSC8103/D Datasheet(PDF) 58 Page - Freescale Semiconductor, Inc

MSC8103/D Datasheet(HTML) 58 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL