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PSD833F2 Datasheet(PDF) 62 Page - STMicroelectronics

Part # PSD833F2
Description  Configurable Memory System on a Chip for 8-Bit Microcontrollers
PDF  110 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD833F2 Datasheet(HTML) 62 Page - STMicroelectronics

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PSD835G2
PSD8XX Family
61
9.4.5 Ports A, B and C – Functionality and Structure
Ports A and B have similar functionality and structure, as shown in Figure 26. The two
ports can be configured to perform one or more of the following functions:
t MCU I/O Mode
t CPLD Output – Micro
⇔Cells McellA[7:0] can be connected to Port A.
McellB[7:0] can be connected to Port B.
External chip select ECS [7:0] can be connected to Port C.
t CPLD Input
– Via the input Micro
⇔Cells.
t Address In – Additional high address inputs using the Input Micro
⇔Cells.
t Open Drain/Slew Rate – pins PC[7:0]can be configured to fast slew rate,
pins PA[7:0] and PB[7:0] can be configured to Open Drain
Mode.
Figure 26. Port A, B and C
The
PSD835G2
Functional
Blocks
(cont.)



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