PSD833F2 datasheet(16/110 Pages) STMICROELECTRONICS

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PSD835G2

PSD8XX Family

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Periph-

FL_data

Boot_data

FL_code

Boot_code

SR_code

mode

VM Register

Bit definitions:

Bit 0 0 = PSEN can’t access SRAM in 80C51XA modes.

1 = PSEN can access SRAM in 80C51XA modes.

Bit 1 0 = PSEN can’t access Boot in 80C51XA modes.

1 = PSEN can access Boot in 80C51XA modes.

Bit 2 0 = PSEN can’t access main Flash in 80C51XA modes.

1 = PSEN can access main Flash in 80C51XA modes.

Bit 3 0 = RD can’t access Boot in 80C51XA modes.

1 = RD can access Boot in 80C51XA modes.

Bit 4 0 = RD can’t access main Flash in 80C51XA modes.

1 = RD can access main Flash in 80C51XA modes.

Bit 7 0 = Peripheral mode of Port F is disabled.

1 = Peripheral mode of Port F is enabled.

Note: Upon reset, Bit1-Bit4 are loaded to configurations selected by the user in PSDsoft. Bit 0 and Bit 7 are

always cleared by reset. Bit 0 to Bit 4 are active only when the device is configured in Philips 80C51XA

mode.

* Not used bit should be set to zero

8.0

Definition

(cont.)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

S_size 3

S_size 2

S_size 1

S_size 0

F_size 3

F_size 2

F_size 1

F_size 0

Memory_ID0 Register

Bit definitions:

F_size[3:0] = 4h, main Flash size is 2M bit.

F_size[3:0] = 5h, main Flash size is 8M bit.

S_size[3:0] = 0h, SRAM size is 0K bit.

S_size[3:0] = 1h, SRAM size is 16K bit.

S_size[3:0] = 3h, SRAM size is 64K bit.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

B_type 1

B_type 0

B_size 3

B_size 2

B_size 1

B_size 0

Memory_ID1 Register

Bit definitions:

B_size[3:0] = 0h, Boot block size is 0K bit.

B_size[3:0] = 2h, Boot block size is 256K bit.

B_type[1:0] = 0h, Boot block is Flash memory.

*Not used bit should be set to zero.

PSD833F2 Datasheet(PDF) 16 Page - STMicroelectronics

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