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NRF52820-QDAA-R Datasheet(PDF) 379 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 379 Page - Nordic Semiconductor |
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379 / 437 page ![]() Peripherals An ENDEPIN[0] event will be generated when the data has been transferred from memory to the USBD peripheral. Finally, an EP0DATADONE event will be generated when the data has been transmitted over USB and acknowledged by the host. The software can then either prepare and transmit the next data transaction by repeating the above sequence, or initiate the status stage through the EP0STATUS task. SETUP 8 bytes ACK USB host USB device IN NAK IN DATA (n) ACK OUT DATA (0) ACK Setup stage Data stage Status stage IN NAK IN NAK IN DATA (n+1) ACK IN NAK Events & tasks Software Figure 139: Control read transfer It is possible to enable a shortcut from the EP0DATADONE event to the EP0STATUS task, typically if the data stage is expected to take a single transfer. If there is no data stage, the software can initiate the status stage through the EP0STATUS task right away, as as shown in the following figure. SETUP 8 bytes ACK USB host USB device OUT DATA (0) ACK Setup stage Status stage OUT NAK DATA (0) Events & tasks Software Figure 140: Control read no data transfer 6.26.9.2 Control write transfer This section describes how the software responds to a control write transfer. The software has to prepare EasyDMA by pointing to the buffer in memory that shall contain the incoming data. If no other EasyDMA transfers are ongoing with USBD, the software can then send the EP0RCVOUT task, which will make USBD acknowledge (ACK) the first OUT+DATA transaction from the host. An EP0DATADONE event will be generated when a new OUT+DATA has been transmitted over USB, and is about to get acknowledged by the device. After receiving the first transaction, a STARTED event (the EPOUT0 bit set in the EPSTATUS register) is generated when the EPOUT[0].PTR and .MAXCNT registers have been captured. Software may then prepare them for the next data transaction. 4463_156 v1.0 379 |
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