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NRF52820-QDAA-R Datasheet(PDF) 66 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 66 Page - Nordic Semiconductor |
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66 / 437 page ![]() Power and clock management 5.3.7.18 DCDCEN Address offset: 0x578 Enable DC/DC converter for REG1 stage Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A RW DCDCEN Enable DC/DC converter for REG1 stage. Disabled 0 Disable Enabled 1 Enable 5.3.7.19 MAINREGSTATUS Address offset: 0x640 Main supply status Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A R MAINREGSTATUS Main supply status Normal 0 Normal voltage mode. Voltage supplied on VDD. High 1 High voltage mode. Voltage supplied on VDDH. 5.3.7.20 RAM[n].POWER (n=0..3) Address offset: 0x900 + (n × 0x10) RAMn power control register Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID D C B A Reset 0x0000FFFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ID Access Field Value ID Value Description A-B RW S[i]POWER (i=0..1) Keep RAM section Si on or off in System ON mode. RAM sections are always retained when on, but can also be retained when off depending on the settings in SiRETENTION. All RAM sections will be off in System OFF mode. Off 0 Off On 1 On C-D RW S[i]RETENTION (i=0..1) Keep retention on RAM section Si when RAM section is off Off 0 Off On 1 On 5.3.7.21 RAM[n].POWERSET (n=0..3) Address offset: 0x904 + (n × 0x10) RAMn power control set register 4463_156 v1.0 66 |
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