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NRF52820-QDAA-R Datasheet(PDF) 55 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 55 Page - Nordic Semiconductor |
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55 / 437 page ![]() Power and clock management USB supply LDO VBUS DECUSB 3.3 V USB power 5 V USB supply Figure 19: USB voltage regulator To ensure stability, the input and output of the USB regulator need to be decoupled with a suitable decoupling capacitor. See Reference circuitry on page 418 for the recommended values. 5.3.3 System OFF mode System OFF is the deepest power saving mode the system can enter. In this mode, the system’s core functionality is powered down and all ongoing tasks are terminated. The device can be put into System OFF mode using the register SYSTEMOFF on page 64. When in System OFF mode, the device can be woken up through one of the following signals: • The DETECT signal, optionally generated by the GPIO peripheral. • The ANADETECT signal, optionally generated by the LPCOMP module. • Detecting a valid USB voltage on the VBUS pin (VBUS,DETECT). • A reset. The system is reset when it wakes up from System OFF mode. One or more RAM sections can be retained in System OFF mode, depending on the settings in the RAM[n].POWER registers. RAM[n].POWER are retained registers. These registers are usually overwritten by the start-up code provided with the nRF application examples. Before entering System OFF mode, all on-going EasyDMA transactions need to have completed. See peripheral specific chapters for more information about how to acquire the status of EasyDMA transactions. 5.3.3.1 Emulated System OFF mode If the device is in Debug Interface mode, System OFF will be emulated to secure that all required resources needed for debugging are available during System OFF. Required resources needed for debugging include the following key components: • Debug on page 40 4463_156 v1.0 55 |
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