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NRF52820-QDAA-R Datasheet(PDF) 110 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 110 Page - Nordic Semiconductor |
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110 / 437 page ![]() Peripherals Comparator core MODE VIN- MUX VIN+ PSEL RESULT + - Output 0 = BELOW (VIN+ < VIN-) 1 = ABOVE (VIN+ > VIN-) HYST Figure 36: Comparator overview Once enabled (using the ENABLE register), the comparator is started by triggering the START task and stopped by triggering the STOP task. The comparator will generate a READY event to indicate when it is ready for use and the output is correct. The delay between START and READY is tINT_REF,START if an internal reference is selected, or t COMP,START if an external reference is used. When the COMP module is started, events will be generated every time VIN+ crosses VIN-. Operation modes The comparator can be configured to operate in two main operation modes: differential mode and single- ended mode. See the MODE register for more information. In both operation modes, the comparator can operate in different speed and power consumption modes (low-power, normal and high-speed). High- speed mode will consume more power compared to low-power mode, and low-power mode will result in slower response time compared to high-speed mode. Use the PSEL register to select any of the AIN0-AIN6 pins (or VDDH/5) as VIN+ input, regardless of the operation mode selected for the comparator. The source of VIN- depends on which of the following operation mode are used: • Differential mode - Derived directly from AIN0 to AIN7 • Single-ended mode - Derived from VREF. VREF can be derived from VDD, AIN0-AIN7 or internal 1.2 V, 1.8 V and 2.4 V references. The selected analog pins will be acquired by the comparator once it is enabled. An optional hysteresis on VIN+ and VIN- can be enabled when the module is used in differential mode through the HYST register. In single-ended mode, VUP and VDOWN thresholds can be set to implement a hysteresis using the reference ladder (see Comparator in single-ended mode on page 112). This hysteresis is in the order of magnitude of VDIFFHYST, and shall prevent noise on the signal to create unwanted events. See Hysteresis example where VIN+ starts below VUP on page 113 for illustration of the effect of an active hysteresis on a noisy input signal. An upward crossing will generate an UP event and a downward crossing will generate a DOWN event. The CROSS event will be generated every time there is a crossing, independent of direction. The immediate value of the comparator can be sampled to RESULT register by triggering the SAMPLE task. 4463_156 v1.0 110 |
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