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H8/3021 Datasheet(PDF) 331 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 331 Page - Renesas Technology Corp |
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331 / 712 page ![]() 9. Programmable Timing Pattern Controller Rev.2.00 Mar. 22, 2007 Page 307 of 684 REJ09B0352-0200 9.3.3 Normal TPC Output Sample Setup Procedure for Normal TPC Output: Figure 9.4 shows a sample procedure for setting up normal TPC output. Normal TPC output Set next TPC output data Compare match? No Yes Set next TPC output data ITU setup Port and TPC setup ITU setup 10 11 9 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. Set TIOR to make GRA an output compare register (with output inhibited). Set the TPC output trigger period. Select the counter clock source with bits TPSC2 to TPSC0 in TCR. Select the counter clear source with bits CCLR1 and CCLR0. Enable the IMFA interrupt in TIER. Set the initial output values in the DR bits of the input/output port pins to be used for TPC output. Set the DDR bits of the input/output port pins to be used for TPC output to 1. Set the NDER bits of the pins to be used for TPC output to 1. Select the ITU compare match event to be used as the TPC output trigger in TPCR. Set the next TPC output values in the NDR bits. Set the STR bit to 1 in TSTR to start the timer counter. At each IMFA interrupt, set the next output values in the NDR bits. 1 2 3 4 5 6 7 8 Select GR functions Set GRA value Select counting operation Select interrupt request Start counter Set initial output data Select port output Enable TPC output Select TPC output trigger Figure 9.4 Setup Procedure for Normal TPC Output (Example) |
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