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H8/3021 Datasheet(PDF) 333 Page - Renesas Technology Corp

Part # H8/3021
Description  16-Bit Single-Chip Microcomputer
PDF  712 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8/3021 Datasheet(HTML) 333 Page - Renesas Technology Corp

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9. Programmable Timing Pattern Controller
Rev.2.00 Mar. 22, 2007 Page 309 of 684
REJ09B0352-0200
9.3.4
Non-Overlapping TPC Output
Sample Setup Procedure for Non-Overlapping TPC Output: Figure 9.6 shows a sample
procedure for setting up non-overlapping TPC output.
Non-overlapping
TPC output
Set next TPC output data
Compare match A?
No
Yes
Set next TPC output data
Start counter
ITU setup
Port and
TPC setup
ITU setup
Set initial output data
Set up TPC output
Enable TPC transfer
Select TPC transfer trigger
Select non-overlapping groups
1
2
3
4
12
10
11
5
6
7
8
9
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
Set TIOR to make GRA and GRB output
compare registers (with output inhibited).
Set the TPC output trigger period in GRB
and the non-overlap margin in GRA.
Select the counter clock source with bits
TPSC2 to TPSC0 in TCR. Select the counter
clear source with bits CCLR1 and CCLR0.
Enable the IMFA interrupt in TIER.
Set the initial output values in the DR bits
of the input/output port pins to be used for
TPC output.
Set the DDR bits of the input/output port pins
to be used for TPC output to 1.
Set the NDER bits of the pins to be used for
TPC output to 1.
In TPCR, select the ITU compare match
event to be used as the TPC output trigger.
In TPMR, select the groups that will operate
in non-overlap mode.
Set the next TPC output values in the NDR
bits.
Set the STR bit to 1 in TSTR to start the timer
counter.
At each IMFA interrupt, write the next output
value in the NDR bits.
Select GR functions
Set GR values
Select counting operation
Select interrupt requests
Figure 9.6 Setup Procedure for Non-Overlapping TPC Output (Example)



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