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H8/3021 Datasheet(PDF) 544 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 544 Page - Renesas Technology Corp |
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544 / 712 page ![]() 17. Power-Down State Rev.2.00 Mar. 22, 2007 Page 520 of 684 REJ09B0352-0200 17.4.4 Sample Application of Software Standby Mode Figure 17.1 shows an example in which software standby mode is entered at the fall of NMI and exited at the rise of NMI. With the NMI edge select bit (NMIEG) cleared to 0 in SYSCR (selecting the falling edge), an NMI interrupt occurs. Next the NMIEG bit is set to 1 (selecting the rising edge) and the SSBY bit is set to 1; then the SLEEP instruction is executed to enter software standby mode. Software standby mode is exited at the next rising edge of the NMI signal . φ NMI NMIEG SSBY NMI exception handling NMIEG = 1 SSBY = 1 Software standby mode (power- down state) Oscillator settling time (t osc2) SLEEP instruction NMI exception handling Clock oscillator Figure 17.1 NMI Timing for Software Standby Mode (Example) 17.4.5 Usage Note The I/O ports retain their existing states in software standby mode. If a port is in the high output state, its output current is not reduced. |
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