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H8/3021 Datasheet(PDF) 316 Page - Renesas Technology Corp

Part # H8/3021
Description  16-Bit Single-Chip Microcomputer
PDF  712 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8/3021 Datasheet(HTML) 316 Page - Renesas Technology Corp

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9. Programmable Timing Pattern Controller
Rev.2.00 Mar. 22, 2007 Page 292 of 684
REJ09B0352-0200
9.2.3
Port B Data Direction Register (PBDDR)
PBDDR is an 8-bit write-only register that selects input or output for each pin in port B.
Bit
Initial value
Read/Write
7
PB DDR
0
W
Port B data direction 7, 5 to 0
These bits select input or
output for port B pins
7
6
—
0
W
5
PB DDR
0
W
5
4
PB DDR
0
W
4
3
PB DDR
0
W
3
2
PB DDR
0
W
2
1
PB DDR
0
W
1
0
PB DDR
0
W
0
Reserved bit
Port B is multiplexed with pins TP
15, TP13 to TP8. Bits corresponding to pins used for TPC output
must be set to 1. For further information about PBDDR, see section 7.11, Port B.
9.2.4
Port B Data Register (PBDR)
PBDR is an 8-bit readable/writable register that stores TPC output data for groups 2 and 3, when
these TPC output groups are used.
Bit
Initial value
Read/Write
Note: * Bits selected for TPC output by NDERB settings become read-only bits.
0
PB
0
R/(W)
0
1
PB
0
R/(W)
1
2
PB
0
R/(W)
2
3
PB
0
R/(W)
3
4
PB
0
R/(W)
4
5
PB
0
R/(W)
5
6
—
0
R/(W)
7
PB
0
R/(W)
7
Port B data 7, 5 to 0
These bits store output data
for TPC output groups 2 and 3
**
*
*
*
*
*
*
Reserved bit
For further information about PBDR, see section 7.11, Port B.



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