H8SLASH3021 datasheet(325/712 Pages) RENESAS

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9. Programmable Timing Pattern Controller

Rev.2.00 Mar. 22, 2007 Page 301 of 684

REJ09B0352-0200

Bits 3 and 2—Group 1 Compare Match Select 1 and 0 (G1CMS1, G1CMS0): These bits

select the compare match event that triggers TPC output group 1 (TP

7 to TP4).

Bit 3

G1CMS1

Bit2

G1CMS0

Description

TPC output group 1 (TP

7 to TP4) is triggered by compare match in

ITU channel 0

TPC output group 1 (TP

7 to TP4) is triggered by compare match in

ITU channel 1

TPC output group 1 (TP

7 to TP4) is triggered by compare match in

ITU channel 2

TPC output group 1 (TP

7 to TP4) is triggered

by compare match in ITU channel 3

(Initial value)

Bits 1 and 0—Group 0 Compare Match Select 1 and 0 (G0CMS1, G0CMS0): These bits

select the compare match event that triggers TPC output group 0 (TP

3 to TP0).

Bit1

G0CMS1

Bit0

G0CMS0

Description

TPC output group 0 (TP

3 to TP0) is triggered by compare match in

ITU channel 0

TPC output group 0 (TP

3 to TP0) is triggered by compare match in

ITU channel 1

TPC output group 0 (TP

3 to TP0) is triggered by compare match in

ITU channel 2

TPC output group 0 (TP

3 to TP0) is triggered

by compare match in ITU channel 3

(Initial value)

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