H8SLASH3021 datasheet(324/712 Pages) RENESAS

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9. Programmable Timing Pattern Controller

Rev.2.00 Mar. 22, 2007 Page 300 of 684

REJ09B0352-0200

Bits 7 and 6—Group 3 Compare Match Select 1 and 0 (G3CMS1, G3CMS0): These bits

select the compare match event that triggers TPC output group 3 (TP

15 to TP12)*.

Bit 7

G3CMS1

Bit6

G3CMS0

Description

TPC output group 3 (TP

15 to TP12)* is triggered by compare match

in ITU channel 0

TPC output group 3 (TP

15 to TP12)* is triggered by compare match

in ITU channel 1

TPC output group 3 (TP

15 to TP12)* is triggered by compare match

in ITU channel 2

TPC output group 3 (TP

15 to TP12)* is triggered

by compare match in ITU channel 3

(Initial value)

Note:

Since this LSI does not have a TP

14 pin, the TP14 signal cannot be output off-chip.

Bits 5 and 4—Group 2 Compare Match Select 1 and 0 (G2CMS1, G2CMS0): These bits

select the compare match event that triggers TPC output group 2 (TP

11 to TP8).

Bit 5

G2CMS1

Bit4

G2CMS0

Description

TPC output group 2 (TP

11 to TP8) is triggered by compare match

in ITU channel 0

TPC output group 2 (TP

11 to TP8) is triggered by compare match

in ITU channel 1

TPC output group 2 (TP

11 to TP8) is triggered by compare match

in ITU channel 2

TPC output group 2 (TP

11 to TP8) is triggered

by compare match in ITU channel 3

(Initial value)

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