H8SLASH3002 datasheet(115/700 Pages) RENESAS

115 / 700 page

IRQbF flag is cleared by the execution of interrupt exception handling.

(2) When the IRQaF flag is cleared, there is contention with IRQb generation (IRQaF flag

setting). (IRQbF was 0 when ISR was read to clear the IRQaF flag, but IRQbF is set to 1

before ISR is written to.)

If the above setting conditions (1) to (3) and generation conditions (1) and (3) are all fulfilled,

when the ISR write in generation condition (2) is performed the IRQbF flag will be cleared

inadvertently, and interrupt exception handling will not be executed.

However, this inadvertent clearing of the IRQbF flag will not occur if 0 is written to this flag even

once between generation conditions (1) and (2).

Figure 5-9 IRQnF Flag when Interrupt Exception Handling is not Executed

Either of the methods shown below should be used to prevent this problem.

Method 1

When clearing the IRQaF flag, read ISR as a byte unit instead of using a bit-manipulation

instruction, and write a byte value that clears the IRQaF flag to 0 and sets the other bits to 1.

Example: When a = 0

MOV.B @ISR, R0L

MOV.B #HFE, R0L

MOV.B R0L, @ISR

100

TIER write cycle by CPU

1 read 0 written

1 read

IRQaF

IRQbF

written

IRQb

executed

1 read 0 written

IMIA exception handling

Generation condition (1)

Generation condition (2)

(Inadvertent clearing)

H8/3002 Datasheet(PDF) 115 Page - Renesas Technology Corp