M38K09RFS datasheet(145/328 Pages) RENESAS

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2.2 Interrupt

Rev.2.00

Oct 05, 2006

page 16 of 111

38K0 Group

REJ09B0337-0200

APPLICATION

(3)

Interrupt disable flag

The interrupt disable flag is allocated to bit 2 of the processor status register. The interrupt disable

flag controls the acceptance of interrupt request except BRK instruction.

When this flag is “1”, the acceptance of interrupt requests is disabled. When the flag is “0”, the

acceptance of interrupt requests is enabled. This flag is set to “1” with the SEI instruction and is set

to “0” with the CLI instruction.

When a main routine branches to an interrupt processing routine, this flag is automatically set to “1”,

so that multiple interrupts are disabled. To use multiple interrupts, set this flag to “0” with the CLI

instruction within the interrupt processing routine. Figure 2.2.12 shows an example of multiple interrupts.

Table 2.2.2 List of interrupt bits according to interrupt source

USB bus reset

USB SOF

USB device

External bus

INT0

Timer X

Timer 1

Timer 2

INT1

Serial I/O receive

Serial I/O transmit

CNTR0

Key-on wake-up

A/D converter

Interrupt enable bit

Address

003E16

003F16

Bit

Interrupt request bit

Address

003C16

003D16

Bit

Interrupt source

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