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AT89C51ED2-RDTUM Datasheet(PDF) 82 Page - ATMEL Corporation |
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AT89C51ED2-RDTUM Datasheet(HTML) 82 Page - ATMEL Corporation |
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82 / 137 page ![]() 82 4235K–8051–05/08 AT89C51RD2/ED2 continue for a number of clock cycles before the internal reset algorithm takes control. Reset initializes the AT89C51RD2/ED2 and vectors the CPU to address 0000h. 3. Generate an enabled external Keyboard interrupt (same behavior as external interrupt). Note: During the time that execution resumes, the internal RAM cannot be accessed; however, it is pos- sible for the Port pins to be accessed. To avoid unexpected outputs at the Port pins, the instruction immediately following the instruction that activated the Power-Down mode should not write to a Port pin or to the external RAM. Note: Exit from power-down by reset redefines all the SFRs, but does not affect the internal RAM content. Table 18-1. Pin Conditions in Special Operating Modes Mode Port 0 Port 1 Port 2 Port 3 Port 4 ALE PSEN# Reset Floating High High High High High High Idle (internal code) Data Data Data Data Data High High Idle (external code) Floating Data Data Data Data High High Power-Down (internal code) Data Data Data Data Data Low Low Power-Down (external code) Floating Data Data Data Data Low Low |
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