A32100DX-PLB datasheet(55/84 Pages) ACTEL

55 / 84 page

Discontinued – v3.0

Integrato r Se ries F P G A s: 1200 XL and 320 0DX Fam ilies

Pin Descript ions

CLKA, CLKB

Clock A and Clock B (Input)

TTL clock inputs for clock distribution networks. The clock

input is buffered prior to clocking the logic modules. This

pin can also be used as an I/O.

DCLK

Diagnostic Clock (Input)

TTL

clock

input

for

diagnostic

probe

and

device

programming. DCLK is active when the MODE pin is HIGH.

This pin functions as an I/O when the MODE pin is LOW.

GND

Ground (Input)

Input LOW supply voltage.

I/O

Input/Output (Input, Output)

I/O pin functions as an input, output, three-state or

bidirectional buffer. Input and output levels are compatible

with standard TTL and CMOS specifications. Unused I/O

pins are automatically driven LOW by the Designer Series

software for XL devices and are automatically tristated for

DX devices.

MODE

Mode (Input)

The MODE pin controls the use of multi-function pins

(DCLK, PRA, PRB, SDI, TDO). When the MODE pin is HIGH,

the special functions are active. To provide ActionProbe

capability, the MODE pin should be terminated to GND

through a 10K resistor so the MODE pin can be pulled HIGH

when required.

No Connection

This pin is not connected to circuitry within the device.

These pins can be driven to any voltage or can be left

floating with no effect on the operation of the device.

PRA, I/O

Probe A (Output)

The Probe A pin is used to output data from any

user-defined

design

node

within

the

device.

This

independent diagnostic pin is used in conjunction with the

Probe B pin to allow real-time diagnostic output of any

signal path within the device. The Probe A pin can be used

as a user-defined I/O when debugging has been completed.

The pin's probe capabilities can be permanently disabled to

protect programmed design confidentiality. PRA is active

when the MODE pin is HIGH. This pin functions as an I/O

when the MODE pin is LOW.

PRB, I/O

Probe B (Output)

The Probe B pin is used to output data from any

user-defined

design

node

within

the

device.

This

independent diagnostic pin is used in conjunction with the

Probe A pin to allow real-time diagnostic output of any

signal path within the device. The Probe B pin can be used

as a user-defined I/O when debugging has been completed.

The pin’s probe capabilities can be permanently disabled to

protect programmed design confidentiality. PRB is active

when the MODE pin is HIGH. This pin functions as an I/O

when the MODE pin is LOW.

QCLKA,B,C,D Quadrant Clock (Input/Output)

These four pins are the quadrant clock inputs. When not

used as a register control signal, these pins can function as

general purpose I/O.

SDO

Serial Data (Output)

Serial data output for diagnostic probe and device

programming. SDO is active when the MODE pin is HIGH.

This pin functions as an I/O when MODE pin is LOW.

SDI

Serial Data Input (Input)

Serial data input for diagnostic probe and device

programming. SDI is active when the MODE pin is HIGH.

This pin functions as an I/O when the MODE pin is LOW.

TCK

Test Clock

Clock signal to shift the JTAG data into the device. This pin

functions as an I/O when the JTAG fuse is not programmed.

TDI

Test Data In

Serial data input for JTAG instructions and data. Data is

shifted in on the rising edge of TCLK. This pin functions as

an I/O when the JTAG fuse is not programmed.

TDO

Test Data Out

Serial data output for JTAG instructions and test data. This

pin functions as an I/O when the JTAG fuse is not

programmed.

TMS

Test Mode Select

Serial data input for JTAG test mode. Data is shifted in on

the rising edge of TCLK. This pin functions as an I/O when

the JTAG fuse is not programmed.

VCC

Supply Voltage (Input)

Input HIGH supply voltage.

Note:

TCK, TDI, TDO, TMS are only available on devices

containing JTAG circuitry.

A32100DX-PLB Datasheet(PDF) 55 Page - Actel Corporation

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