ATtiny24-20SSU datasheet(5/236 Pages) ATMEL

5 / 236 page

8006H–AVR–10/09

ATtiny24/44/84

The ATtiny24/44/84 provides the following features: 2/4/8K byte of In-System Programmable

Flash, 128/256/512 bytes EEPROM, 128/256/512 bytes SRAM, 12 general purpose I/O lines, 32

general purpose working registers, an 8-bit Timer/Counter with two PWM channels, a 16-bit

timer/counter with two PWM channels, Internal and External Interrupts, a 8-channel 10-bit ADC,

programmable gain stage (1x, 20x) for 12 differential ADC channel pairs, a programmable

Watchdog Timer with internal oscillator, internal calibrated oscillator, and four software select-

able power saving modes. Idle mode stops the CPU while allowing the SRAM, Timer/Counter,

ADC, Analog Comparator, and Interrupt system to continue functioning. ADC Noise Reduction

mode minimizes switching noise during ADC conversions by stopping the CPU and all I/O mod-

ules except the ADC. In Power-down mode registers keep their contents and all chip functions

are disbaled until the next interrupt or hardware reset. In Standby mode, the crystal/resonator

oscillator is running while the rest of the device is sleeping, allowing very fast start-up combined

with low power consumption.

The device is manufactured using Atmel’s high density non-volatile memory technology. The on-

chip ISP Flash allows the Program memory to be re-programmed in-system through an SPI

serial interface, by a conventional non-volatile memory programmer or by an on-chip boot code

running on the AVR core.

The ATtiny24/44/84 AVR is supported with a full suite of program and system development tools

including: C Compilers, Macro Assemblers, Program Debugger/Simulators and Evaluation kits.

ATtiny24-20SSU Datasheet(PDF) 5 Page - ATMEL Corporation