HT45R37V datasheet(49/90 Pages) HOLTEK

49 / 90 page

HT45R37V

Rev. 1.00

October 20, 2009

methods of transferring data on the I

2C bus, the slave

transmit mode and the slave receive mode.

There are several configuration options associated with

the I

2C interface. One of these is to enable the function

which selects the SIM pins rather than normal I/O pins.

Note that if the configuration option does not select the

SIMfunction then the SIMENbit in the SIMCTL0 register

will have no effect. A configuration option exists to allow

a clock other than the system clock to drive the I

2C inter-

face. Another configuration option determines the

debounce time of the I

2C interface. This uses the inter-

nal clock to in effect add a debounce time to the external

clock to reduce the possibility of glitches on the clock

line causing erroneous operation. The debounce time, if

selected, can be chosen to be either 1 or 2 system

clocks.

SIM

Function

SIM function

SIM Interface enable or disable

2C debounce

No debounce, 1 system clock;

2 system clocks

2C Interface Configuration Options

2C Registers

There are three control registers associated with the I

bus, SIMCTL0, SIMCTL1 and SIMARand one data reg-

ister, SIMDR. The SIMDRregister, which is shown in the

above SPI section, is used to store the data being trans-

mitted and received on the I

2C bus. Before the

microcontroller writes data to the I

2C bus, the actual data

to be transmitted must be placed in the SIMDR register.

After the data is received from the I

2C bus, the

microcontroller can read it from the SIMDRregister. Any

transmission or reception of data from the I

2C bus must

be made via the SIMDR register.

Note that the SIMAR register also has the name

SIMCTL2 which is used by the SPI function. Bits

SIMIDLE, SIMEN and bits SIM0~SIM2 in register

SIMCTL0 are used by the I

2C interface. The SIMCTL0

· SIMIDLE

The SIMIDLE bit is used to select if the I

2C interface

continues running when the device is in the IDLE

mode. Setting the bit high allows the I

2C interface to

maintain operation when the device is in the Idle

mode. Clearing the bit to zero disables any I

2C opera-

tions when in the Idle mode.

This SPI/I

2C idle mode control bit is located at

CLKMOD register bit4.

· SIMEN

The SIMEN bit is the overall on/off control for the I

interface. When the SIMENbit is cleared to zero to dis-

able the I

2C interface, the SDA and SCL lines will be in

a floating condition and the I

2C operating current will

be reduced to a minimum value. When the bit is high

the I

2C interface is enabled. The SIMconfiguration op-

tion must have first enabled the SIM interface for this

bit to be effective. Note that when the SIMEN bit

changes from low to high the contents of the I

2C con-

trol registers will be in an unknown condition and

should therefore be first initialised by the application

program

· SIM0~SIM2

These bits setup the overall operating mode of the

SIM function. To select the I

2C function, bits SIM2~

SIM0 should be set to the value 110.

· RXAK

The RXAK flag is the receive acknowledge flag. When

the RXAK bit has been reset to zero it means that a

correct acknowledge signal has been received at the

9th clock, after 8 bits of data have been transmitted.

When in the transmit mode, the transmitter checks the

RXAK bit to determine if the receiver wishes to receive

the next byte. The transmitter will therefore continue

sending out data until the RXAK bit is set high. When

this occurs, the device will release the SDA line to al-

low the master to send a STOP signal to release the

bus.

I 2 C D a t a R e g i s t e r

( S I M D R )

S l a v e A d d r e s s R e g i s t e r

( S I M A R )

S h i f t R e g i s t e r

D i r e c t i o n C o n t r o l

A d d r e s s M a t c h

H A A S B i t

I 2 C I n t e r r u p t

D a t a i n L S B

D a t a O u t M S B

T r a n s m i t / R e c e i v e

C o n t r o l U n i t

8 - b i t D a t a C o m p l e t e

D e t e c t S t a r t o r S t o p

D a t a B u s

A d d r e s s

C o m p a r a t o r

E n a b l e / D i s a b l e A c k n o w l e d g e

R e a d / w r i t e S l a v e

S R W B i t

H B B B i t

H T X B i t

S C L P i n

S D A P i n

H C F B i t

2C Block Diagram

HT45R37V Datasheet(PDF) 49 Page - Holtek Semiconductor Inc

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