HCS12 datasheet(379/452 Pages) FREESCALE

379 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

379

Access Detail

Each code letter except (,), and comma equals one CPU cycle. Uppercase = 16-bit

operation and lowercase = 8-bit operation. For complex sequences see the CPU12

Reference Manual (CPU12RM/AD) for more detailed information.

— High-order byte of a 16-bit relative offset for long branches.

— Trap number $30–$39 or $40–$FF.

— Signed relative offset $80 (–128) to $7F (

+127).

Offset relative to the byte following the relative offset byte, or

low-order byte of a 16-bit relative offset for long branches.

— Indexed addressing post-byte. See Table A-3 on page 397

and Table A-4 on page 398.

— Free cycle, CPU doesn’t use bus

— Read PPAGE internally

— Read indirect pointer (indexed indirect)

— Read indirect PPAGE value (CALL indirect only)

— Write PPAGE internally

— Optional program word fetch (P) if instruction is misaligned and has

an odd number of bytes of object code — otherwise, appears as

a free cycle (f); Page 2 prebyte treated as a separate 1-byte instruction

— Program word fetch (always an aligned-word read)

— 8-bit data read

— 16-bit data read

— 8-bit stack write

— 16-bit stack write

— 8-bit data write

— 16-bit data write

— 8-bit stack read

— 16-bit stack read

— 16-bit vector fetch (always an aligned-word read)

— 8-bit conditional read (or free cycle)

— 16-bit conditional read (or free cycle)

— 8-bit conditional write (or free cycle)

()

— Indicate a microcode loop

— Indicates where an interrupt could be honored

Special Cases

PPP/P

— Short branch, PPP if branch taken, P if not

OPPP/OPO

— Long branch, OPPP if branch taken, OPO if not

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