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PIC12F519-E/MS Datasheet(PDF) 17 Page - Microchip Technology |
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PIC12F519-E/MS Datasheet(HTML) 17 Page - Microchip Technology |
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17 / 96 page ![]() © 2008 Microchip Technology Inc. DS41319B-page 15 PIC12F519 TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on Power-on Reset N/A TRISGPIO — — TRISGPIO5 TRISGPIO4 TRISGPIO3 TRISGPIO2 TRISGPIO1 TRISGPIO0 --11 1111 N/A OPTION Contains Control Bits to Configure Timer0 and Timer0/WDT Prescaler 1111 1111 00h INDF Uses Contents of FSR to Address Data Memory (not a physical register) xxxx xxxx 01h TMR0 Timer0 Module Register xxxx xxxx 02h(1) PCL Low Order 8 bits of PC 1111 1111 03h STATUS GPWUF —PA0 TO PD ZDC C 0-01 1xxx 04h FSR Indirect Data Memory Address Pointer 110x xxxx 05h OSCCAL CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 — 1111 111- 06h GPIO — — GP5 GP4 GP3 GP2 GP1 GP0 --xx xxxx 21h EECON — — — FREE WRERR WREN WR RD ---0 x000 25h EEDATA EEDATA7 EEDATA6 EEDATA5 EEDATA4 EEDATA3 EEDATA2 EEDATA1 EEDATA0 xxxx xxxx 26h EEADR — — EEADR5 EEADR4 EEADR3 EEADR2 EEADR1 EEADR0 --xx xxxx Legend: x = unknown, u = unchanged, – = unimplemented, read as ‘0’ (if applicable). Shaded cells = unimplemented or unused Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.6 “Program Counter” for an explanation of how to access these bits. |
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