HT82K70E-L datasheet(9/59 Pages) HOLTEK

9 / 59 page

HT82K70E-L/HT82K70A-L/HT82K76E-L

Rev. 1.20

February 1, 2011

Only the destination of the lower-order byte in the ta-

ble is well-defined, the other bits of the table word are

transferred to the lower portion of TBLH, and the re-

maining 1-bit words are read as

²0². The Table

Higher-order byte register (TBLH) is read only. The ta-

ble pointer (TBLP, TBHP) is a read/write register,

which indicates the table location. Before accessing

the table, the location must be placed in the TBLP and

TBHP (If the OTP option TBHP is disabled, the value

in TBHP has no effect). The TBLH is read only and

cannot be restored. If the main routine and the ISR

(Interrupt Service Routine) both employ the table read

instruction, the contents of the TBLH in the main rou-

tine are likely to be changed by the table read instruc-

tion used in the ISR. Errors can occur. In other words,

using the table read instruction in the main routine and

the ISR simultaneously should be avoided.

However, if the table read instruction has to be applied

in both the main routine and the ISR, the interrupt

should be disabled prior to the table read instruction. It

will not be enabled until the TBLH has been backed

up. All table related instructions require two cycles to

complete the operation. These areas may function as

normal program memory depending on the require-

ments.

Once configuration option is enabled, the instruction

²TABRDC [m]² reads the ROM data as defined by

TBLP and TBHP value. Otherwise, the configuration

option TBHP is disabled, the instruction

²TABRDC

[m]

² reads the ROM data as defined by TBLP and the

current program counter bits.

The following diagram illustrates the addressing/data

flow of the look-up table:

Table Program Example

The following example, for the HT82K76E_L, shows

how the table pointer and table data is defined and re-

trieved from the microcontroller. This example uses raw

table data located in the last page which is stored there

using the ORG statement. The value at this ORG state-

ment is

²1F00H² which refers to the start address of the

last page within the 8K Program Memory of device. The

table pointer is setup here to have an initial value of

²06H². This will ensure that the first data read from the

data table will be at the Program Memory address

²1F06H² or 6 locations after the start of the last page.

Note that the value for the table pointer is referenced to

the first address of the present page if the

²TABRDC

[m]

² instruction is being used. The high byte of the table

data which in this case is equal to zero will be trans-

ferred to the TBLH register automatically when the

²TABRDL [m]² instruction is executed.

Instruction

Table Location Bits

b12

b11

b10

TABRDC[m]

PC12 PC11 PC10

PC9

PC8

TABRDL [m]

11111

Table Location

Note:

PC12~PC8: Current Program Counter bits when configuration option TBHP is disable

@7~@0: Table Pointer TBLP bits

For the HT82K70E-L and HT82K70A-L, the table address location is 12 bits wide, i.e. from b11 ~ b0

For the HT82K76E-L, the table address location is 13 bits wide, i.e. from b12 ~ b0

P r o g r a m

M e m o r y

P r o g r a m C o u n t e r

H i g h B y t e

T B L P

T B L H

S p e c i f i e d b y [ m ]

T a b l e C o n t e n t s H i g h B y t e

T a b l e C o n t e n t s L o w B y t e

Table Read

- TBLP only

P r o g r a m

M e m o r y

T B L H

S p e c i f i e d b y [ m ]

H i g h B y t e o f T a b l e C o n t e n t s

L o w B y t e o f T a b l e C o n t e n t s

T B L P

T B H P

Table Read

- TBLP/TBHP

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