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HT82K70E-L Datasheet(PDF) 32 Page - Holtek Semiconductor Inc |
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HT82K70E-L Datasheet(HTML) 32 Page - Holtek Semiconductor Inc |
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32 / 59 page ![]() HT82K70E-L/HT82K70A-L/HT82K76E-L Rev. 1.20 32 February 1, 2011 Bit Name Description 7~5 LVD_sel To Selected low voltage detector level, Bit7, 6, 5 = 000: 1.0V 001: 1.2V 010: 1.4V 011: 2.0V 100: 2.4V 101: 2.7V 110: 3.0V or 1.8V, control by CTLR register bit 0 111: 3.3V or 2.2V, control by CTLR register bit 0 4 LVD_Rd_ctrl To control the DC/DC to check the LVD voltage 1: enable LVD 0: disable LVD (default) 3 Low battery Flag for battery low signal (error 5%) 1: battery voltage £ according LVD_sel voltage 0: battery voltage > according LVD_sel voltage The user should wait at least 20 ms after set LVD_rd_ctrl and then read the corresponding voltage Low battery signal 2 WDTEN To control the Watchdog timer 1: enable 0: disable 1 TMR1S To selected Timer 1 source 1: WDT OSC 0: fSYS/4 Where WDTOSC is selected as TMR1 source. WDTOSC is always enabled. 0 LVD_mod To selected LVD_sel=110 & 111 mode 1: 1.8V/2.2V 0: 3.0V/3.3V (default) Control Register - CTLR for HT82K70E-L and HT82K70A-L Bit Name Description 7~5 LVD_sel To Selected low voltage detector level, Bit7, 6, 5 = 000: 1.0V 001: 1.2V 010: 1.4V 011: 2.0V 100: 2.4V 101: 2.7V 110: 3.0V 111: 3.3V 4 LVD_Rd_ctrl To control the DC/DC to check the LVD voltage 1: enable LVD 0: disable LVD (default) 3 Low battery Flag for battery low signal (error 5%) 1: battery voltage £ according LVD_sel voltage 0: battery voltage > according LVD_sel voltage The user should wait at least 20 ms after set LVD_rd_ctrl and then read the corresponding voltage Low battery signal 2 WDTEN To control the Watchdog timer 1: enable 0: disable 1 TMR1S To selected Timer 1 source 1: WDT OSC 0: fSYS/4 Where WDTOSC is selected as TMR1 source. WDTOSC is always enabled. 0 ¾ Unimplemented, read as ²0² Control Register - CTLR for HT82K76E-L |
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