CY8C53_11 datasheet(60/106 Pages) CYPRESS

Part #	CY8C53

Description	Programmable System-on-Chip (PSoC) DC to 67 MHz operation

PDF	106 Pages

Scroll/Zoom	100%

Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

Logo

60 / 106 page

PRELIMINARY

PSoC® 5: CY8C53 Family Datasheet

Document Number: 001-66237 Rev. *A

Page 60 of 106

Note

14. Based on device characterization (Not production tested).

Table 11-3. AC Specifications[14]

Parameter

Description

Conditions

Min

Typ

Max

Units

FCPU

CPU frequency

–

67.01

MHz

FBUSCLK

Bus frequency

–

67.01

MHz

Svdd

VDD ramp rate

–

V/ns

TIO_INIT

Time from VDDD/VDDA/VCCD/VCCA

≥ IPOR to I/O ports set to their reset

states

–

µs

TSTARTUP

Time from VDDD/VDDA/VCCD/VCCA

≥ min operating voltage to CPU

executing code at reset vector

No PLL used, IMO boot mode 12 MHz

typ.

–

µs

TSLEEP

Wakeup from limited active mode –

Application of non-LVD interrupt to

beginning of execution of next CPU

instruction

–

µs

THIBERNATE Wakeup form hibernate mode –

Application of external interrupt to

beginning of execution of next CPU

instruction

–

100

µs

[+] Feedback

CY8C53 Datasheet(PDF) 60 Page - Cypress Semiconductor

CY8C53 Datasheet(HTML) 60 Page - Cypress Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL