DSPIC33FJ06GS101 datasheet(91/386 Pages) MICROCHIP

91 / 386 page

DS70318F-page 91

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

FIGURE 6-2:

SYSTEM RESET TIMING

Reset

Run

Device Status

VDD

VPOR

VBOR

POR Reset

BOR Reset

SYSRST

TPWRT

TPOR

TBOR

Oscillator Clock

TOSCD

TOST

TLOCK

Time

FSCM

TFSCM

Note 1:

POR Reset: A POR circuit holds the device in Reset when the power supply is turned on. The POR circuit is active

until VDD crosses the VPOR threshold and the delay, TPOR, has elapsed.

BOR Reset: The on-chip voltage regulator has a BOR circuit that keeps the device in Reset until VDD crosses the

VBOR threshold and the delay, TBOR, has elapsed. The delay, TBOR, ensures the voltage regulator output becomes

stable.

PWRT Timer: The programmable power-up timer continues to hold the processor in Reset for a specific period of

time (TPWRT) after a BOR. The delay, TPWRT, ensures that the system power supplies have stabilized at the appro-

priate level for full-speed operation. After the delay, TPWRT has elapsed and the SYSRST becomes inactive, which in

turn, enables the selected oscillator to start generating clock cycles.

Oscillator Delay: The total delay for the clock to be ready for various clock source selections is given in Table 6-1.

Refer to Section 8.0 “Oscillator Configuration” for more information.

When the oscillator clock is ready, the processor begins execution from location 0x000000. The user application

programs a GOTO instruction at the Reset address, which redirects program execution to the appropriate start-up

routine.

If the Fail-Safe Clock Monitor (FSCM) is enabled, it begins to monitor the system clock when the system clock is ready

and the delay, TFSCM, has elapsed.

TABLE 6-2:

OSCILLATOR DELAY

Symbol

Parameter

Value

VPOR

POR threshold

1.8V nominal

TPOR

POR extension time

μs maximum

VBOR

BOR threshold

2.5V nominal

TBOR

BOR extension time

100

μs maximum

TPWRT

Programmable

power-up time delay

0-128 ms nominal

TFSCM

Fail-Safe Clock Monitor

delay

900

μs maximum

Note:

When

the

device

exits

the

Reset

condition (begins normal operation), the

device operating parameters (voltage,

frequency, temperature, etc.) must be

within their operating ranges; otherwise,

the device may not function correctly.

The user application must ensure that

the delay between the time power is first

applied, and the time SYSRST becomes

inactive, is long

enough

to get all

operating parameters within specification.

DSPIC33FJ06GS101 Datasheet(PDF) 91 Page - Microchip Technology

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