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WM8961GEFL/V Datasheet(PDF) 111 Page - Wolfson Microelectronics plc |
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WM8961GEFL/V Datasheet(HTML) 111 Page - Wolfson Microelectronics plc |
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111 / 116 page ![]() Pre-Production WM8961 w PP, April 2009, Rev 3.0 111 REGISTER SETTING COMMENT 0x0F - write 0x0000 Reset device if required 0x0F - read - Read Chip ID (=0x1801) 0x08 - write 0x01F4 Enable system clocks 0x52 - write 0x0003 Class W power switching 0x57 - write 0x0020 Enable the write sequencer, DAC to headphone playback with -20dB volume setting 0x5A - write 0x0080 Start the write sequencer to configure pre-programmed enable of the DAC playback (digital input to headphone output) path. Analogue input PGAs still muted. Allow enough time for the sequencer to finish 0x5D - read - Read status of write sequencer and wait until the WSEQ_BUSY,bit0,=0 which indicates that the DAC playback path has been configured. Then continue. Table 68 Register Settings for DAC to Headphone playback (-20dB volume setting) DAC TO SPEAKER AND HEADPHONE PLAYBACK In order to simplify the configuration of DAC to speaker playback, the headphone output should first be enabled. Figure 69 WM8961 Block Diagram for DAC to Speaker and Headphone Playback |
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