JS28F128P33TF70A datasheet(36/88 Pages) MICROCHIP

Part #	JS28F128P33TF70A

Description	128-Mbit, 64-Mbit Single Bit per Cell (SBC)

PDF	88 Pages

Scroll/Zoom	100%

Manufacturer	MICROCHIP [Microchip Technology]

Direct Link	http://www.microchip.com

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36 / 88 page

P33-65nm

Datasheet

Jul 2011

Order Number: 208034-04

11.1.3

End of Word Line (EOWL) Considerations

End of Wordline (EOWL) WAIT states can result when the starting address of the burst

operation is not aligned to an 8-word boundary; that is, A[3:1] of start address does

not equal 0x0. Figure 10, “End of Wordline Timing Diagram” on page 36 illustrates the

end of wordline WAIT state(s), which occur after the first 8-word boundary is reached.

The number of data words and the number of WAIT states is summarized in Table 14,

“End of Wordline Data and WAIT state Comparison” on page 37for both P33-130nm

and P33-65nm SBC devices.

Figure 9: Example Latency Count Setting Using Code 3

CLK

CE#

ADV#

A[MAX:0]

D[15:0]

Data

Code 3

Address

Data

R103

High-Z

A[MAX:1]

Figure 10: End of Wordline Timing Diagram

A[Max:1]

ADV#

OE#

WAIT

DQ[15:0]

Data

EOW L

CLK

Latency Count

Address

JS28F128P33TF70A Datasheet(PDF) 36 Page - Microchip Technology