30F4013 datasheet(33/228 Pages) MICROCHIP

33 / 228 page

 2010 Microchip Technology Inc.

DS70138G-page 33

dsPIC30F3014/4013

All byte loads into any W register are loaded into the

LSB. The MSB is not modified.

A Sign-Extend (SE) instruction is provided to allow

users to translate 8-bit signed data to 16-bit signed

values. Alternatively, for 16-bit unsigned data, users

can clear the MSB of any W register by executing a

Zero-Extend (ZE) instruction on the appropriate

address.

Although most instructions are capable of operating on

word or byte data sizes, it should be noted that some

instructions, including the DSP instructions, operate

only on words.

3.2.5

NEAR DATA SPACE

An 8-Kbyte ‘near’ data space is reserved in X address

memory space between 0x0000 and 0x1FFF, which is

directly addressable via a 13-bit absolute address field

within all memory direct instructions. The remaining X

address space and all of the Y address space is

addressable indirectly. Additionally, the whole of X data

space is addressable using MOV instructions, which

support memory direct addressing with a 16-bit

address field.

3.2.6

SOFTWARE STACK

The dsPIC DSC devices contain a software stack. W15

is used as the Stack Pointer.

The Stack Pointer always points to the first available

free word and grows from lower addresses towards

higher addresses. It pre-decrements for stack pops

and post-increments for stack pushes as shown in

Figure 3-10. Note that for a PC push during any CALL

instruction, the MSB of the PC is zero-extended before

the push, ensuring that the MSB is always clear.

There is a Stack Pointer Limit register (SPLIM) associ-

ated with the Stack Pointer. SPLIM is uninitialized at

Reset. As is the case for the Stack Pointer, SPLIM<0>

is forced to ‘0’ because all stack operations must be

word-aligned. Whenever an Effective Address (EA) is

generated, using W15 as a source or destination

pointer, the address thus generated is compared with

the value in SPLIM. If the contents of the Stack Pointer

(W15) and the SPLIM register are equal and a push

operation is performed, a stack error trap does not

occur. The stack error trap occurs on a subsequent

push operation. Thus, for example, if it is desirable to

cause a stack error trap when the stack grows beyond

address 0x2000 in RAM, initialize the SPLIM with the

value, 0x1FFE.

Similarly, a Stack Pointer underflow (stack error) trap is

generated when the Stack Pointer address is found to

be less than 0x0800, thus preventing the stack from

interfering with the Special Function Register (SFR)

space.

A write to the SPLIM register should not be immediately

followed by an indirect read operation using W15.

FIGURE 3-10:

CALL

STACK FRAME

Note:

A PC push during exception processing

concatenates the SRL register to the MSB

of the PC prior to the push.

PC<15:0>

000000000

W15 (before CALL)

W15 (after CALL)

0x0000

PC<22:16>

POP

: [--W15]

PUSH : [W15++]

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