ADC10D040

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SNAS149G – OCT 2001 – REVISED MARCH 2013

Standby (STBY) Pin

The Standby (STBY) pin may be used to put the ADC10D040 into a low power mode where it consumes just 30

mW and can quickly be brought to full operation. The device operates normally with a logic low on this and the

PD pins.

While in the Standby mode the data outputs contain the results of the last conversion before going into this

Mode.

Power Down (PD) Pin

The Power Down (PD) pin puts the device into a low-power “sleep” state where it consumes less than 1 mW

when the PD pin is at a logic high. Power consumption is reduced more when the PD pin is high than when the

STBY pin is high, but recovery to full operation is much quicker from the standby state than it is from the power

down state. When the STBY and PD pins are both high, the ADC10D040 is in the power down mode.

While in the Power Down mode the data outputs contain the results of the last conversion before going into this

mode. The output pins are always in the active state. That is, the output pins do not have a high impedance

state.

GAIN Pin

The GAIN pin sets the internal signal gain of the “I” and “Q” inputs. With this pin at a logic low, the full scale

INPUT/OUTPUT RELATIONSHIP ALTERNATIVES

The GAIN pin of the ADC10D040 offers input range selection, while the OF pin offers a choice of offset binary or

2's complement output formatting.

The relationship between the GAIN, OF, analog inputs and the output code are as defined in Table 1. Keep in

mind that the input signals must not exceed the power supply rails.

Table 1. ADC10D040 Input/Output Relationships

GAIN

OF

I+ / Q+

I

− / Q−

Output Code

0

0

11 1111 1111

0

0

10 0000 0000

0

0

00 0000 0000

0

1

01 1111 1111

0

1

00 0000 0000

0

1

10 0000 0000

1

0

11 1111 1111

1

0

10 0000 0000

1

0

00 0000 0000

1

1

01 1111 1111

1

1

00 0000 0000

1

1

10 0000 0000

POWER SUPPLY CONSIDERATIONS

A/D converters draw sufficient transient current to corrupt their own power supplies if not adequately bypassed. A

10 µF to 50 µF tantalum or aluminum electrolytic capacitor should be placed within half an inch (1.2 centimeters)

of the A/D power pins, with a 0.1 µF ceramic chip capacitor placed as close as possible to each of the

converter's power supply pins. Leadless chip capacitors are preferred because they have low lead inductance.

While a single voltage source should be used for the analog and digital supplies of the ADC10D040, these

supply pins should be well isolated from each other to prevent any digital noise from being coupled to the analog

Copyright © 2001–2013, Texas Instruments Incorporated

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