PD46185092B_15 datasheet(6/36 Pages) RENESAS

6 / 36 page

μPD46185092B, μPD46185182B, μPD46185362B

R10DS0112EJ0200 Rev.2.00

Page 6 of 35

Nov 09, 2012

Pin Description

(1/2)

Symbol

Type

Description

Input

Synchronous Address Inputs: These inputs are registered and must meet the setup and hold

times around the rising edge of K for READ cycles and must meet the setup and hold times

around the rising edge of K# for WRITE cycles. All transactions operate on a burst of two

words (one clock period of bus activity). These inputs are ignored when device is

deselected, i.e., NOP (R# = W# = HIGH).

D0 to Dxx

Input

Synchronous Data Inputs: Input data must meet setup and hold times around the rising

edges of K and K# during WRITE operations. See Pin Arrangement for ball site location of

individual signals.

x9 device uses D0 to D8.

x18 device uses D0 to D17.

x36 device uses D0 to D35.

Q0 to Qxx

Output

Synchronous Data Outputs: Output data is synchronized to the respective C and C# or to K

and K# rising edges if C and C# are tied HIGH. Data is output in synchronization with C and

C# (or K and K#), depending on the R# command. See Pin Arrangement for ball site

location of individual signals.

x9 device uses Q0 to Q8.

x18 device uses Q0 to Q17.

x36 device uses Q0 to Q35.

Input

Synchronous Read: When LOW this input causes the address inputs to be registered and a

READ cycle to be initiated. This input must meet setup and hold times around the rising

edge of K.

Input

Synchronous Write: When LOW this input causes the address inputs to be registered and a

WRITE cycle to be initiated. This input must meet setup and hold times around the rising

edge of K.

BWx#

Input

Synchronous Byte Writes: When LOW these inputs cause their respective byte to be

registered and written during WRITE cycles. These signals must meet setup and hold times

around the rising edges of K and K# for each of the two rising edges comprising the WRITE

cycle. See Pin Arrangement for signal to data relationships.

x9 device uses BW0#.

x18 device uses BW0#, BW1#.

x36 device uses BW0# to BW3#.

See Byte Write Operation for relation between BWx# and Dxx.

K, K#

Input

Input Clock: A READ address and control input signal are input in synchronization with the

rising edge of K and a WRITE address is input in synchronization with the rising edge of K#.

Input data is input in synchronization with the rising edge of K and K#. K# is ideally 180

degrees out of phase with K. All synchronous inputs must meet setup and hold times around

the clock rising edges.

C, C#

Input

Output Clock: This clock pair provides a user controlled means of tuning device output data.

The rising edge of C# is used as the output timing reference for first output data. The rising

edge of C is used as the output reference for second output data. Ideally, C# is 180 degrees

out of phase with C. When use of K and K# as the reference instead of C and C#, then fixed

C and C# to HIGH. Operation cannot be guaranteed unless C and C# are fixed to HIGH

(i.e. toggle of C and C#).

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