MEC1322 datasheet(50/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 50

 2014 - 2015 Microchip Technology Inc.

3.4.4

SYSTEM POWER SEQUENCING

The following table defines the behavior of the Power Sources in each of the defined ACPI power states.

Note 3-3

VCC1 power supply is always on while the battery pack or ac power is applied to the system.

Note 3-4

This device requires that the VBAT power is on when the VCC1 power supply is on. External circuitry,

a diode isolation circuit, is implemented on the motherboard to extend the battery life. This external

circuitry ensures the VBAT pin will derive power from the VCC1 power well when it is on. Therefore,

the VBAT supply will never appear to be off when the VCC1 rail is on. See APPLICATION NOTE: on

page 48.

3.5

Clocks

The following section defines the MEC1322 clocks that are generated or referenced.

TABLE 3-4:

TYPICAL POWER SUPPLIES VS. ACPI POWER STATES

Supply

Name

ACPI Power State

Description

(FULL

ON)

(POS)

(STR)

(STD)

(Soft Off)

(MECH Off)

VCC1

OFF

MEC1322 “Always-on”

Supply. (Note 3-3)

VBAT (VCC0)

(Note 3-4)

MEC1322 Battery Back-up

Supply

TABLE 3-5:

CLOCK DEFINITIONS

Clock Name

Frequency

Description

Source

SUSCLK

32.768 KHz

32.768 kHz Suspend Well Clock

Source is a single-ended input that is

an accurate 32.768KHz clock.

(Note 3-5)

Pin Interface (XTAL2)

32.768 kHz Crystal

Oscillator

32.768 KHz

A 32.768 KHz parallel resonant crys-

tal connected between the XTAL1

and XTAL2 pins.

Pin Interface (XTAL1 and XTAL2)

48 MHz Ring

Oscillator

48MHz

The 48 MHz Ring Oscillator is a high-

accuracy, low power, low start-up

latency 48 MHz Ring Oscillator.

Enabled by VCC1 Power (Note 3-6).

May be stopped by Chip Power Man-

agement Features.

24MHz_Clk

24 MHz

Derived clock for UART

48 MHz Ring Oscillator

16MHz_Clk

16MHz

Derived clock for SMBus Controller

48 MHz Ring Oscillator

1.8432MHz_Clk

1.843 MHz

Derived clock for UART

48 MHz Ring Oscillator

100kHz_Clk

100 kHz

Derived for several blocks in the EC

Subsystem, including, but not limited

to, PWM, TACH.

48 MHz Ring Oscillator

32KHz_Clk

32.768 KHz

Internal 32kHz clock domain

Pin Interface:

XTAL2: 32KHz Crystal input/ single-

ended clock source input pin.

XTAL1: 32KHz Crystal output

The XOSEL bit configures the source

of this clock domain as either a sin-

gle-ended 32.768 KHz clock input

(SUSCLK) or the 32.768 kHz Crystal

Oscillator (Note 3-7). If neither of

these is available, this clock domain

is derived from the 48 MHz Ring

Oscillator.

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