MEC1322 datasheet(16/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 16

 2014 - 2015 Microchip Technology Inc.

1.4.7

FAN TACHOMETER AND PWM INTERFACE

TABLE 1-11:

FAN TACHOMETER AND PWM INTERFACE

1.4.8

GENERAL PURPOSE I/O INTERFACE

TABLE 1-12:

GPIO INTERFACE

1.4.9

MISCELLANEOUS FUNCTIONS

TABLE 1-13:

MISCELLANEOUS FUNCTIONS

Note 1: The KBRST pin function is the output of CPU_RESET described in Section 11.11.2, "CPU_RESET Hard-

ware Speed-Up," on page 151.

2: The nRESET_OUT pin function is an external output signal version of the internal signal nSIO_RESET. See

the iRESET_OUT bit in the Power Reset Control (PWR_RST_CTRL) Register on page 71 and nSIO_RE-

SET in Table 3-7, “Definition of Reset Signals,” on page 52.

3: XNOR is a push-pull output. This function is not configured through the associated GPIO Pin Control Reg-

ister; however the drive strength is configured through the associated GPIO Pin Control Register 2.

Note:

No GPIO pin should be left floating in a system. If a GPIO pin is not in use, it should be either tied high, tied

low, or pulled to either power or ground through a resistor.

PWM & TACHOMETER

(6 Pins)

Pin Ref. Number

Signal Name

Description

Notes

TACH1

Fan Tachometer Input 2

101

TACH2PWM_IN

Tach input to RPM-Based Fan Speed Control

Algorithm

120

PWM0

Pulse Width Modulator Output 0

118

PWM1

Pulse Width Modulator Output 1

PWM3

Pulse Width Modulator Output 3

121

TACH2PWM_OUT

Pulse Width Modulator Output from RPM

Based Fan Speed Control Algorithm

GPIO Interface

Pin Ref. Number

Signal Name

Description

Notes

See Pin Configuration

Table

GPIO

General Purpose Input Output Pins

Note 12

MISC Functions

(13 Pins)

Pin Ref. Number

Signal Name

Description

Notes

102

A20M

KBD GATEA20 Output

122

KBRST

CPU_RESET

113

LED0

LED (Bllinking/Breathing PWM) Output 0

114

LED1

LED (Bllinking/Breathing PWM) Output 1

115

LED2

LED (Bllinking/Breathing PWM) Output 2

LED3

LED (Bllinking/Breathing PWM) Output 3

TFDP_CLK

Trace FIFO debug port - clock

TFDP_DATA

Trace FIFO debug port - data

nRESET_OUT

EC-driven External System Reset

Note 6

VCC_PWRGD

System Main Power Indication

VCC1_RST#

Reset Generator Output

RSMRST#

Resume Reset Output

Note 6

XNOR

Test Output

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