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TMP320C2811PBKA Datasheet(PDF) 36 Page - Texas Instruments

Part # TMP320C2811PBKA
Description  TMS320R2811, TMS320R2812 Digital Signal Processors
PDF  147 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMP320C2811PBKA Datasheet(HTML) 36 Page - Texas Instruments

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Functional Overview
36
June 2004
SPRS257
Table 3−2. Peripheral Frame 0 Registers†
NAME
ADDRESS RANGE
SIZE (x16)
ACCESS TYPE‡
Device Emulation Registers
0x00 0880
0x00 09FF
384
EALLOW protected
reserved
0x00 0A00
0x00 0B1F
288
XINTF Registers
0x00 0B20
0x00 0B3F
32
Not EALLOW protected
reserved
0x00 0B40
0x00 0BFF
192
CPU-TIMER0/1/2 Registers
0x00 0C00
0x00 0C3F
64
Not EALLOW protected
reserved
0x00 0C40
0x00 0CDF
160
PIE Registers
0x00 0CE0
0x00 0CFF
32
Not EALLOW protected
PIE Vector Table
0x00 0D00
0x00 0DFF
256
EALLOW protected
Reserved
0x00 0E00
0x00 0FFF
512
† Registers in Frame 0 support 16-bit and 32-bit accesses.
‡ If registers are EALLOW protected, then writes cannot be performed until the user executes the EALLOW instruction. The EDIS instruction
disables writes. This prevents stray code or pointers from corrupting register contents.
Table 3−3. Peripheral Frame 1 Registers
NAME
ADDRESS RANGE
SIZE (x16)
ACCESS TYPE
eCAN Registers
0x00 6000
0x00 60FF
256
(128 x 32)
Some eCAN control registers (and selected bits in other eCAN
control registers) are EALLOW-protected.
eCAN Mailbox RAM
0x00 6100
0x00 61FF
256
(128 x 32)
Not EALLOW-protected
reserved
0x00 6200
0x00 6FFF
3584
The eCAN control registers only support 32-bit read/write operations. All 32-bit accesses are aligned to even address boundaries.
Table 3−4. Peripheral Frame 2 Registers†
NAME
ADDRESS RANGE
SIZE (x16)
ACCESS TYPE
reserved
0x00 7000
0x00 700F
16
System Control Registers
0x00 7010
0x00 702F
32
EALLOW Protected
reserved
0x00 7030
0x00 703F
16
SPI-A Registers
0x00 7040
0x00 704F
16
Not EALLOW Protected
† Peripheral Frame 2 only allows 16-bit accesses. All 32-bit accesses are ignored (invalid data may be returned or written).



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