FIGURE 5. Test Conditions and Component Values for Static Window Truncation Testing

The DP8459 VCO is constrained at all times to operate within

present at the REFERENCE CLOCK input. Internal frequency

detector/comparator circuitry senses when the VCO overruns

the 50% boundary and forces the charge pump to move the

VCO back toward the REFERENCE CLOCK frequency until

the 50% constraint is again satisfied—thus preventing VCO

runaway in the event of loss of lock or during extended periods

where ENCODED READ DATA is not present. Additionally, this

technique causes the filter node voltage to behave as if a

voltage clamp were present at the Charge Pump Output,

preventing the control voltage, in the event of loss of lock, from

drifting outside of its operating range and inadvertently

extending lock recovery time.

A special test mode feature has been incorporated into the

DP8459 which allows a specific input pin to change function

and act as an excitation source (substitute VCO) for clocking

internal logic circuitry. When the last bit in the CONTROL

REGISTER is taken to a logical ONE, the VCO is stopped, and

the HGD input is redirected to act as a clock source for the

VCO divider circuitry. Additionally, the Delay Line and Timing

Extractor blocks are disabled when the Test Mode is entered,

and thus the device will not function normally and should not

be operated in this mode for purposes other than internal gate

exercising. Further information regarding application of the

Test Mode will be furnished at the Customer’s request: contact

National Semiconductor Logic Marketing Group or Logic

Applications Group.

2.1 Functional Block Description

PULSE GATE

The function of the Pulse Gate within the DP8459 is twofold.

First, the block contains the ECL flip-flop which captures each

arriving ENCODED READ DATA bit and transmits the bit to the

SYNCHRONIZED DATA output. The very high switching

speed of the bit-capture ECL flip-flop minimizes the portion of

window margin loss caused by flip-flop metastability at window

boundaries.

Second,

the

Pulse

Gate

regulates

the

transmission

of

the

VCO

waveform

into

the

Phase

Comparator, allowing only one VCO pulse to pass with each

arriving ENCODED READ DATA pulse. See

Figure 6 for a

simplified logical representation of the Pulse Gate block. The

one-to-one data/VCO pulse ratio produced by the Pulse Gate

permits the multiple-harmonic nature of encoded data to be

accommodated by the phase/frequency comparator. During

the non-Read mode or during the portion of the Read mode

within which the Customer has set the FREQUENCY LOCK

CONTROL pin to a logical-zero (low), the Pulse Gate is

inactive (bypassed) and the VCO frequency is divided as

appropriate

to

match

the

incoming

frequency

source

(ENCODED READ DATA or the REFERENCE CLOCK input).

Code

MFM

MFM

MFM

2,7

2,7

Units

Rate

0.500

2

5

10

20

Mbit/sec

VCO freq.

1

4

10

20

40

MHz

Sync bytes

12

12

12

12

12

bytes

pulses/byte

8

8

8

4

4

flux tran’s

sync length

192

48

19.2

9.6

4.8

µs

sync freq

0.500

2

5

5

10

MHz

N

sync

2

2

2

4

4

none

N

4/2

4/2

4/2

8/3

8/3

none

ζ

min

0.5

0.5

0.5

0.5

0.5

none

ζ

max

0.7

0.7

0.7

0.8

0.8

none

ζ

sync

0.7

0.7

0.7

0.7

0.7

none

ω

sync

35

144

353

606

1230

Krad/sec

C1

0.5

0.12

0.05

0.018

8200 pF

R1

82

82

82

150

150

Ω

C2

0.01 µF

2700

1000

510

200

pF

Note 1: Preamble (sync) natural frequency chosen yields phase error

≤ 0.01 radians at sync field end, given a 1% frequency step at READ GATE assertion. Rnom

= Rboost = 2.4k for all above loop filter selections. HGD is tied to RG, FLC is tied to PD and CPO is tied to VCOI as well as to the loop flter components.

Note 2: Component values are listed for purposes of window specification testing and correlation. These values do not necessarily yield optimum performance in

actual system applications. PLL dynamics and code characteristics are presented for Customer information and convenience only. See Section 3.1.

http:\\www.national.com

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PrintDate=1996/07/31 PrintTime=11:05:48 ds009322 Rev. No. 1

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